6.10.4 Device Terminating Read DMA
Table 24: Ultra DMA cycle timing chart (Device terminating Read)
DMARQ
DMACK-
STOP
HDMARDY-
DSTROBE
DD(15:0)
Device drives DD
Table 25: Ultra DMA cycle timings (Device Terminating Read)
PARAMETER DESCRIPTION
(all values in ns)
tSS
Time from DSTROBE edge to
negation of DMARQ
tLI
Limited interlock time
tAZ
Maximum time allowed for output
drivers to release
tZAH
Maximum delay time required for
output
tMLI
Interlock time with minimum
tCS
CRC word setup time at device
tCH
CRC word hold time at device
tACK
Hold time for DMACK-
tIORDYZ
Maximum time before releasing
IORDY
tSS
tLI
tLI
tAZ
xxxxxx
tZAH
MODE 0
MIN MAX MIN MAX MIN MAX MIN MAX MIN MAX MIN MAX
50
–
0
150
–
10
20
–
20
–
15
–
5
–
20
–
–
20
Deskstar T7K250 Hard Disk Drive Specification
tMLI
tIORDYZ
tLI
xxxxxxxxxxxxxxxxxx
Host drives DD
MODE 1
MODE 2
50
–
50
–
0
150
0
150
–
10
–
10
20
–
20
–
20
–
20
–
10
–
7
–
5
–
5
–
20
–
20
–
–
20
–
20
38
tACK
tACK
tCH
tCS
xxxxxxxxxx
CRC
MODE 3
MODE 4
50
–
50
–
0
100
0
100
–
10
–
10
20
–
20
–
20
–
20
–
7
–
5
–
5
–
5
–
20
–
20
–
–
20
–
20
MODE 5
50
–
0
75
–
10
20
–
20
–
5
–
5
–
20
–
–
20