Processor; Secondary Cache; Flash Rom - NEC PowerMate VP75 User Manual

1-6 Technical Information

Processor

The PowerMate VP series of computers use the 75 MHz Pentium processor with an
internal speed of 75 MHz and an external speed of 50 MHz. The processor has 16 KB of write-
back internal cache, 8 KB for instructions and 8 KB for data. A math coprocessor is integrated in
the processor.
The processor is an advanced 64-bit processor designed to optimize multitasking operating sys-
tems. The 64-bit registers and data paths support 64-bit addresses and data types.
To use the Pentium processor's power, the system features an optimized 64-bit memory interface
and complementary 256-KB burst-mode secondary cache.
The processor cache design uses 15-ns static random access memory (SRAM) that allows data
to be sent or received from cache with one wait burst.
The processor is compatible with 8-, 16-, and 32-bit software written for the Intel386™, In-
tel486™, and Pentium processors.
To accommodate future technologies and work requirements, the Pentium processor comes in a
320-pin ZIF socket. The socket provides an upgrade path to the next generation processor.

Secondary Cache

The 16-KB primary cache is integrated in the processor. The system board contains 256 KB of
secondary cache, external to the processor. Cache memory improves read performance by hold-
ing copies of code and data that are frequently requested from the system memory by the proces-
sor. Cache memory is not considered part of the expansion memory.
The cache is connected directly to the processor address bus and uses physical addresses. A bus
feature known as burst enables fast cache fills. Memory areas (pages) can be designated as
cacheable or non-cacheable by software. The cache can also be enabled and disabled by soft-
ware.
The write strategy of the cache (primary and secondary) is write-through. If the write is a cache
hit, an external bus cycle is generated and information is written to the cache. Any area of mem-
ory can be cached in the system. Non-cacheable portions of memory are defined by software.
The cache can be cleared by software instructions.

Flash ROM

Machine language programs are stored in a 28F010 Flash ROM known as the system's ROM
BIOS. The system BIOS and video BIOS are contained in the ROM. The Flash ROM is 128
KB. It consists of 64 KB of system BIOS and 32 KB of video BIOS.