Sharp ER-A450T Service Manual page 15
Service manual
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Also See for ER-A450T:
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3) Pin description
Pin
Signal
In/
No.
name
Out
1
Out
Receipt side paper feed solenoid (NU)
RF
2
Out
Journal side paper feed solenoid (NU)
JF
3
Out
Printer partial cut signal (NU)
PCUT
4
Out
Printer auto cut signal (NU)
FCUT
5
Out
Multi line validation paper feed (NU)
VF
6
Out
Printer stamp signal (NU)
STAMP
7
Out
Slip printer paper feed singnal (NU)
SLFS
8
Out
Slip printer release signal (NU)
SLRS
9
Out
Slip printer motor drive signal (NU)
SLMTD
10
Out
Peripheral output reset
RES
11
Out
Dot head trigger signal (NU)
TRG
12
Out
Dot head trigger signal (NU)
TRG
13
In
Power off signal input
POFF
14
In
(NU)
INT1
15
Out
8 bit serial port output (for CKDC8)
HTS1
16
Out
Serial port shift clock output (for CKDC8)
SCK1
17
In
8 bit serial port input (for CKDC8)
STH1
18
—
Chip select (NU)
RAS VZ
19
—
—
Nu
20
—
+5V
VCC
21
—
GND
GND
22
—
Interrupt (NU)
INTMCR
Turns active when reset and power
23
Out
VRESC
down is met
24
In
Slip printer timing signal (NU)
SLTMG
25
In
Slip printer reset signal (NU)
SLRST
26
In
Address strobe
AS
27
In
Read strobe
RD
28
In
Write strobe
WR
29
In
( ) System clock (9.83 MHz)
Slip printer printhead drive signal (dot7)
30
Out
SDT7
(NU)
Slip printer printhead drive signal (dot6)
31
Out
SDT6
(NU)
Slip printer printhead drive signal (dot5)
32
Out
SDT5
(NU)
33
—
GND
GND
Slip printer printhead drive signal (dot4)
34
Out
SDT4
(NU)
Slip printer printhead drive signal (dot3)
35
Out
SDT3
(NU)
Slip printer printhead drive signal (dot2)
36
Out
SDT2
(NU)
Slip printer printhead drive signal (dot1)
37
Out
SDT1
(NU)
38
I/O
Data bus 0
D0
39
I/O
Data bus 1
D1
40
I/O
Data bus 2
D2
41
I/O
Data bus 3
D3
42
—
GND
GND
43
I/O
Data bus 4
D4
44
I/O
Data bus 5
D5
45
I/O
Data bus 6
D6
46
I/O
Data bus 7
D7
47
Out
SSP interrupt request to CPU
SPRQ
48
In
MPCA reset
RESET
49
In
Shift enable from CKDC8
SHEN
50
In
Interrupt signal (Nu)
INT3
Function
4 – 7
Pin
Signal
In/
No.
name
Out
51
Out
8 bit serial port output to CPU
RXD2
52
In
8 bit serial port input from CPU
TXD2
53
In
Serial port shift clock input from CPU.
SCK2
54
Out
Interrupt request to CPU
IRQ0
55
In
Address bus 0
A0
56
In
Address bus 1
A1
57
In
Address bus 2
A2
58
In
Address bus 3
A3
59
In
Address bus 4
A4
60
In
Address bus 5
A5
61
—
GND
GND
62
—
+5V
VCC
63
In
Address bus 6
A6
64
In
Address bus 7
A7
65
In
Address bus 8
A8
66
In
Address bus 9
A9
67
In
Address bus 10
A10
68
In
Address bus 11
A11
69
In
Address bus 12
A12
70
In
Address bus 13
A13
71
In
Address bus 14
A14
72
In
Address bus 15
A15
73
In
Address bus 16
A16
74
In
Address bus 17
A17
75
In
Address bus 18
A18
76
In
Address bus 19
A19
77
In
Address bus 20
A20
78
In
Address bus 21
A21
79
In
Address bus 22
A22
80
—
LCD CS (NU)
LCDC
81
In
Address bus 23
A23
82
In
Dot pulse control/drive signal (NU: GND)
TRGI
83
Out
Printer timing signal to CPU
PTMG
84
Out
Printer reset signal to CPU
PRST
85
In
Ready from FMC unit
RDY
86
In
To option connector (NU) +5V
IPLON
87
In
Mode select input (GND)
MD1
88
In
Mode select input (GND)
MD0
89
In
+5V
TEST
90
—
Image address 15
MA15
91
—
Nu
MA18
92
—
Nu
MA19
93
—
Nu: +5V
RCVRDY1
94
—
Nu: +5V
RCVRDY2
Remote control encord signal for CPU
95
—
RC0
(NU)
96
—
I/R output for LED (NU)
IRTX
97
—
I/R serial data shift clock (NU)
UASCK
98
—
I/R serial data for CPU (NU)
UARX
99
—
I/R serial data from CPU (NU) +5V
UATX
100 VCC
—
+5V
101 GND
—
GND
102 IRRX
—
I/R input from I/R unit (NU) +5V
103 RCI
—
I/R input from I/R unit (NU) +5V
104 DAX1
—
System clock (NU)
105 DAX2
—
Nu
106 MCR1
—
Nu
Function
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