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Block Diagram
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Two unidirectional 32-bit LVTTL media interfaces (Rx and Tx) programmable to be SPI-
3, UTOPIA 1/2/3 or CSIXL1. Each path is configured for 4x8 bit, 2x16 bit, 1x32 bit or
combinations of 8 and 16 bit data paths.
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DDR SDRAM interface with ECC support.
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Two 32-bit QDR SRAM interfaces. This interface is LA-1 compliant and can therefore
interface with co-processors.
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64-bit, 66 MHz PCI interface, Version 2.2
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1356-Ball FCBGA2 package
PCI Controller
The PCI Controller provides 64-bit, 66-MHz-capable PCI Rev. 2.2 interface. It is also compat-
ible to 32-bit and/or 33 MHz PCI devices. The PCI interface on IXP/CPCI-9120 is clocked at
66 MHz.
DDR Controller
The DDR Controller contains the mechanism that allows the Xscale, microengines and PCI
units to access the DDR SDRAM connected to the IXP2400.
IXP/CPCI-9120 supports non-stacked, non-buffered SO-DIMMs for DDR SDRAM. The
DDR interface operates at 150 MHz on the IXP/CPCI-9120.
QDR SRAM Interface
The IXP2400 has two independent SRAM controllers, each of which supports pipelined QDR
and QDR II SSRAM and/or a coprocessor that adheres to QDR signaling.
One of the two QDR SRAM interfaces of the IXP2400 is used to provide 8 MB of on-board
QDR II SSRAM, while the other is connected to an expansion slot.
On IXP/CPCI-9120, the QDR interfaces of IXP2400 operate at 200 MHz.
Media and Switch Fabric Interface
PHY Modes Supported
The Media and Switch Fabric (MSF) Interface connects the IXP2400 to a physical layer
device (PHY) and/or a Switch Fabric Interface. MSF consists of the following external inter-
faces:
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Receive and transmit interfaces, each of which can be individually configured for either
UTOPIA (Level 1, 2, and 3), POS-PHY (Level 2 and 3) or CSIX protocols.
•
A Flow Control Interface, which provides a point-to-point connection used to pass CSIX-
L1-B flow control C-Frames either between two IXP2400 network processors or between
an IXP2400 and a CSIX-L1-B switch fabric.
•
Each 32-bit interface can be subdivided into 8- or 16-bit channel combinations. The MSF
interface uses 3.3V LVTTL (low-voltage transistor-transistor logic) signaling. While the
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All manuals and user guides at all-guides.com
Devices' features and Data Paths
IXP/CPCI-9120
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