Table of Contents
Advertisement
2.4.5
Clock Input Selection
Using jumper JG20, the user can select either the ADM U21 clock output or an external
clock input via P1 connector P1-C30 pin as the DSP96002 clock source. The ADM clock is
buffered via U6-3 (74AS08 AND Gate), which provides a current source of –2 mA and a
current sink of 20 mA. Table 2-8 shows the clock input/output option selection.
CLOCK SOURCE
ADM U6-3 (default)
External on P1-C30
ADM U6-3
Note:
The ADM is factory equipped with a 40.0 MHz local clock oscillator.
2.4.6
Transfer Acknowledge (TA) Pullup/Pulldown Option
The transfer acknowledge signal on ports A and B must be asserted true low whenever
an external access is made on that port. If no external circuits are provided to assert the
transfer acknowledge signal, the DSP96002 bus will remain pending until the transfer
acknowledge signal occurs. Jumper groups JG21 and JG22 provide an option to always
assert the TA signal so that the DSP96002 does not hang up. When a jumper is placed
across pins 2-3 on JG21 and JG22 , the TA input is always pulled down (asserted)
through a resistor. If a jumper is placed on pins 1–2 of JG21 and JG22, the TA signal is
pulled up (deasserted). JG21 controls the Port B side, and JG22 controls the Port A side.
Note:
The ADM is factory configured for the TA signal to be pulled down.
2.4.7
Bus Grant (BG) Pullup/Pulldown Option
The Bus Grant signal (BG) on ports A and B must be asserted (pulled low) whenever an
external access is made on that port. If no external circuits are provided to assert the bus
grant signal, the DSP96002 bus will remain pending until BG is asserted. Jumper groups
JG26 and JG27 provide an option to keep the BG signal asserted, so that the DSP96002
will not hang up. When pins 2–3 of JG26 and JG27 are jumpered, the BG input is always
pulled down through a resistor. If pins 1–2 of JG26 and JG27 are jumpered, the BG
signal is pulled up. JG26 controls the Port A side and JG27 controls the Port B side.
Note:
The ADM is factory configured for the BG signal to be pulled down.
MOTOROLA
Table 2-8 Clock Input Selection
JG20
1–2
Local ADM clock to DSP96002 only
3–4
External clock into DSP96002
1–2, 3–4
Local ADM clock to DSP96002 and connector
DSP96002ADMUM/AD, Preliminary
DSP96002ADM Technical Summary
Configuring the DSP96002ADM
COMMENT
2-13
Advertisement
Table of Contents
