Chapter 4 Differences Between Target Devices And Target Interface Circuits - NEC IE-178048-NS-EM1 User Manual

CHAPTER 4 DIFFERENCES BETWEEN TARGET DEVICES AND TARGET INTERFACE CIRCUITS

This chapter describes differences between the target device's signal lines and the signal lines of the IE-178048-
NS-EM1's target interface circuit.
Although the target device is a CMOS circuit, the IE-178048-NS-EM1's target interface circuit consists of an
emulation CPU, TTL, CMOS-IC, and other components.
When the IE system is connected with the target system for debugging, the IE system performs emulation so as to
operate as the actual target device would operate in the target system.
However, some minor differences exist since the operations are performed via the IE system's emulation.
(1) Signals input to or output from the emulation CPU ( µ PD178F048)
(2) Signals input to or output from the emulation CPU ( µ PD780009)
(3) Signals input to or output from the FPGA (EPFI0K50)
(4) Other signals
The IE system's circuit is used as follows for signals listed in (1) to (4) above.
(1) Signals input to or output from the emulation CPU ( µ µ µ µ PD178F048)
See Figure 4-1 Equivalent Circuit 1 of Emulation Circuit.
• P00 to P03
• P10 to P13
• P20 to P23
• P70 to P77
• P130 to P134
(2) Signals input to or output from the emulation CPU ( µ µ µ µ PD780009)
See Figure 4-2 Equivalent Circuit 2 of Emulation Circuit.
• RESET
• X1
• P40 to P47
• P50 to P54
• P60 to P67
(3) Signals input to or output from the FPGA (EPFI0K50)
See Figure 4-3 Equivalent Circuit 3 of Emulation Circuit.
• J1 (VSYNC)
• J2 (HSYNC)
• J3 (R)
• J4 (G)
• J5 (B)
• J6 (I)
• J8 (BLANK)
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User's Manual U15928J1V0UM