Asus AAEON EPIC-KBS7 User Manual
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Asus AAEON EPIC-KBS7 User Manual

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EPIC-KBS7
EPIC Board
th
Use r 's Manual 5
E d
Last Updated: October 7, 2021

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Summary of Contents for Asus AAEON EPIC-KBS7

  • Page 1 EPIC-KBS7 EPIC Board Use r ’s Manual 5 Last Updated: October 7, 2021...
  • Page 2 Copyright Notice This document is copyrighted, 2021. All rights are reserved. The original manufacturer reserves the right to make improvements to the products described in this manual at any time without notice. No part of this manual may be reproduced, copied, translated, or transmitted in any form or by any means witho ut the prior written permission of the original manufacturer.
  • Page 3 Acknowledgement All other products’ name or trademarks are properties of their respective owners. Microsoft Windows® is a registered trademark of Microsoft Corp. ⚫ Intel® and Celeron® are registered trademarks of Intel Corporation ⚫ Intel Core™ is a trademark of Intel Corporation ⚫...
  • Page 4 Packing List Before setting up your product, please make sure you have received the following items: I t em Quantity EPIC-KBS7 ⚫ SATA power cable P/N: 1702150155 ⚫ SATA cable P/N: 1709070500 ⚫ Jumper cap P/N: 9657666600 ⚫ If any of these items are missing or damaged, please contact your distributor or sales representative immediately.
  • Page 5 About this Document This User’s Manual contains all the essential information, such as detailed descriptions and explanations on the product’s hardware and software features (if any), its specifications, dimensions, jumper/connector settings and definitions, and driver installation instructions (if any), to facilitate users in setting up their product. Users may refer to the product page at AAEON.com for the latest version of this document.
  • Page 6 Saf e ty Precautions Please read the following safety instructions carefully. It is advised that you keep this manual for future references All cautions and warnings on the device should be noted. Make sure the power source matches the power rating of the device. Position the power cord so that people cannot step on it.
  • Page 7 If any of the following situations arises, please the contact our service personnel: Damaged power cord or plug Liquid intrusion to the device iii. Exposure to moisture Device is not working as expected or in a manner as described in this manual The device is dropped or damaged Any obvious signs of damage displayed on the device...
  • Page 8 FCC Statement This device complies with Part 15 FCC Rules. Operation is subject to the following two conditions: (1) this device may not cause harmful interference, and (2) this device must accept any interference received including interference that may cause undesired operation.
  • Page 9 Chi na RoHS Requirements ( CN) 产品中有毒有害物质或元素名称及含量 AAEON Main Board/ Daughter Board/ Backplane 有毒有害物质或元素 部件名称 铅 汞 镉 六价铬 多溴联苯 多溴二苯醚 (Pb) (Hg) (C d) (C r(VI)) (PBB) (PBDE) 印刷电路板 ○ ○ ○ ○ ○ ○ 及其电子组件 外部信号 ○ ○ ○...
  • Page 10 Chi na RoHS Requirement (EN) Poisonous or Hazardous Substances or Elements in Products AAEON Main Board/ Daughter Board/ Backplane Poisonous or Hazardous Substances or Elements He xavalent Polybrominated Polybrominated C omponent Le ad Me rcury C admium C hromium Biphenyls Diphenyl Ethers (Pb) (Hg)

  • Page 11: Table Of Contents

    Table of Contents Chapter 1 - Product Specifications..............1 Specifications ....................
  • Page 12 2.4.14 COM1 RS232 Pin Header (CN17)............27 2.4.15 COM3 RS232 Pin Header (CN18) ............28 2.4.16 DIO PIN HEADER (CN24) ..............29 2.4.17 COM4 RS232 Pin Header (CN26) ............. 30 2.4.18 USB 3.0 Ports (CN21 / CN22) .............31 2.4.19 Mini- Card Slot (Full-Mini Card) (CN11)..........32 2.4.20 LAN (RJ-45) (CN19 / CN20)...............
  • Page 13 3.5.2 PCH-IO Config uration ............... 62 Setup Submenu: Security ................63 Setup Submenu: Boot .................. 64 3.7.1 BBS Priorities ..................65 Setup Submenu: Save & Exit................ 66 Chapter 4 – Drivers I nstallation ..............67 Driver Download and Installatio n ..............

  • Page 14: Chapter 1 - Product Specifications

    Chapter 1 Chapter 1 - Product Specifications...

  • Page 15: Specifications

    1 .1 Spe cifications System F o rm Factor 4” EPIC Board CP U Generation Intel® Core™ SoC Intel® Core™ i7-6700TE (4C/ 8T, 2.40GHz, up to 3.40 GHz) Intel® Core™ i5-6500TE (4C/ 4T, 2.30GHz, up to 3.30 GHz) Intel® Core™ i3-6100TE (2C/ 4T, 2.70GHz) CP U TDP TDP 35W: i7-6700TE...
  • Page 16 Po wer P o wer Consumption (Typical) 3.5A at +12V, Intel® i7-6700TE, DDR4 2133MHz 16GB P o wer Consumption (Max) Dis play Co ntroller Intel® HD Graphics 630 Intel® HD Graphics 530 LVDS/eDP LVDS Dual Channel 18/24-bit x 1 (Q170) Dis play Interface HDMI x 1 VGA x 1...
  • Page 17 I nt ernal I/O U SB USB2.0 x 2 Serial Port COM2: RS-232/ 422/ 485 x 1 COM1, COM3, COM4: RS-232 x 4 Vid eo LVDS x 1 SA TA SATA III x 2 +5V SATA Power Connector x 1 A ud io Header x 1 (Line-in/ Line-out/ Mic) DI O/GPIO...

  • Page 18: Block Diagram

    Environment Op erating Humidity 0% ~ 90% relative humidity, non-condensing MTBF (Hours) 393,440 Cer tification CE/ FCC Class A 1 .2 Bl ock Diagram Chapter 1 – Product Specifi c ations...

  • Page 19: Chapter 2 - Hardware Information

    Chapter 2 Chapter 2 – Hardware Information...

  • Page 20: Dimensions

    Di mensions Co mponent Side So lder Side Chapter 2 – Hardware Information...
  • Page 21 Sid e View with Thermal Solution EPIC-KBS7-FAN01 EPIC-KBS7-FAN02 Chapter 2 – Hardware Information...

  • Page 22: Jumpers And Connectors

    2.2 Jum pers and Connectors Co mponent Side Chapter 2 – Hardware Information...
  • Page 23 So lder Side Chapter 2 – Hardware Information...

  • Page 24: List Of Jumpers

    2.3 Li st of Jumpers Please refer to the table below for all of the board’s jumpers that you can configure for your application Lab el F unction JP 4 LVDS Power Select/ LVDS BKLT Power Select JP 5 LVDS Backlight Brightness Control Mode Select JP 6 Clear CMOS JP 7...

  • Page 25: Lvds Backlight Brightness Control Mode Select (Jp5)

    2.3 .2 LVDS Backlight Brightness Control Mode Select (JP5) VR Mode PWM Mode (Default) 2.3 .3 Cl e ar CMOS (JP6) 1 2 3 1 2 3 Normal (Default) Clear CMOS 2.3 .4 AT /ATX Select ( JP7) ATX Mode AT Mode (Default) Chapter 2 –...

  • Page 26: Front Panel Header (Jp9)

    2.3 .5 Front Panel Header ( JP9) P in P in Name P in P in Name PWR_BTN- PWR_BTN+ HDD_LED- HDD_LED+ FP_BUZZER- BUZZER+ PWR_LED- PWR_LED+ H/W RESET- H/W RESET+ Chapter 2 – Hardware Information...

  • Page 27: List Of Connectors

    2.4 Li st of Connectors Please refer to the table below for all of the board’s connectors that you can configure for your application Lab el F unction B Z1 PC Buzzer CN 1 Backlight Connector CN 2 2-Pin DC IN Connector CN 3 LVDS Connector CN 4...

  • Page 28: Backlight Connector (Cn1)

    Lab el F unction CN 23 HDMI Connector CN 24 DIO Connector CN 25 VGA Connector CN 26 COM4 RS232 Pin Header CP U 1 CPU Socket DI MM1 RAM Socket 1 LED1 Standby Power LED Indicator LED2 +V5S LED Indicator LED3 HDD LED Indicator U 18...

  • Page 29: 2-Pin Dc In Connector (Cn2)

    2.4.2 2 -Pin DC IN Connector (CN2) P in P in Name Sig nal Type Sig nal Level +12V +9~24V (or +12V) N o te: Pin 1 max current rating is 9A 2.4.3 LVDS Connector (CN3) N o te: LVDS LCD_PWR can be set to +3.3V or +5V by JP4. LCD_PWR supports max current of 2A.
  • Page 30 P in P in Name Sig nal Type Sig nal Level LVDS_A_CLK- DIFF LVDS_A_CLK+ DIFF LCD_PWR +3.3V/+5V LVDS_DA0- DIFF LVDS_DA0+ DIFF LVDS_DA1- DIFF LVDS_DA1+ DIFF LVDS_DA2- DIFF LVDS_DA2+ DIFF LVDS_DA3- DIFF LVDS_DA3+ DIFF DDC_DATA +3.3V DDC_CLK +3.3V LVDS_DB0- DIFF LVDS_DB0+ DIFF LVDS_DB1- DIFF...

  • Page 31: 3-Pin Sb Power In Connector (Cn4)

    P in P in Name Sig nal Type Sig nal Level LVDS_B_CLK+ DIFF 2.4.4 3 -Pin SB Power IN Connector ( CN4) P in P in Name Sig nal Type Sig nal Level PS_ON# +3.3V +5VSB N o te: Maximum current rating of Pin#3/+5VSB is 2A Chapter 2 –...

  • Page 32: Audio Pin Header (Cn5)

    2.4.5 Audi o Pin Header (CN5) MIC_L MIC_R GND_AUDIO LINE_L_IN LINE_R_IN GND_AUDIO LEFT_OUT GND_AUDIO RIGHT_OUT +5V_AUDIO P in P in Name Sig nal Type Sig nal Level MIC_L MIC_R GND_AUDIO LINE_L_IN LINE_R_IN GND_AUDIO LEFT_OUT GND_AUDIO RIGHT_OUT +5V_AUDIO Chapter 2 – Hardware Information...

  • Page 33: Rtc Battery Connector (Cn6)

    2.4.6 RTC Battery Connector ( CN6) P in P in Name Sig nal Type Sig nal Level RTCVCC +3.3V 2.4.7 SATA Power Connector ( CN7) P in P in Name Sig nal Type Sig nal Level N o te: +5V Output for SATA HDD max current 1A Chapter 2 –...

  • Page 34: Usb2.0 Pin Header (Cn8/Cn9)

    2.4.8 USB2.0 Pin Header (CN8/CN9) P in P in Name Sig nal Type Sig nal Level +5VSB USB_D- DIFF USB_D+ DIFF N o te: USB2.0 ports support max current 0.5A 2.4.9 SATA Port 2 ( CN10) P in P in Name Sig nal Type Sig nal Level SATA_TX+...

  • Page 35: Sata Port 1 (Cn13)

    P in P in Name Sig nal Type Sig nal Level SATA_RX- DIFF SATA_RX+ DIFF 2.4.10 SATA Port 1 ( CN13) P in P in Name Sig nal Type Sig nal Level SATA_TX+ DIFF SATA_TX- DIFF SATA_RX- DIFF SATA_RX+ DIFF Chapter 2 –...

  • Page 36: External Fan Pin Header (Cn14)

    2.4.11 E xternal Fan Pin Header ( CN14) P in P in Name Sig nal Type Sig nal Level FAN_POWER +12V FAN_TAC FAN_CTL +3.3V N o te: +12V output for FAN power max current 2A. 2.4.12 LPC Connector for Debug (CN15) P in P in Name Sig nal Type...

  • Page 37: Com2 Rs232/422/485 Pin Header (Cn16)

    P in P in Name Sig nal Type Sig nal level LPC_AD2 LPC_AD3 +V3.3S +3.3V FRAME# RST# SMB_DAT/I2C_SDA SMB_CLK/I2C_CLK SMB_ALERT/SERIRQ 2.4.13 COM2 RS232/422/485 PIN Header ( CN16) R S-232 Mode P in P in Name Sig nal Type Sig nal Level ±5V Chapter 2 –...
  • Page 38 P in P in Name Sig nal Type Sig nal Level ±5V ±5V RI/+5V/+12V IN/ PWR +5V/+12V R S-422 Mode RS422_TX- RS422_TX+ RS422_RX+ RS422_RX- NC/+5V/+12V P in P in Name Sig nal Type Sig nal Level RS422_TX- ±5V RS422_TX+ ±5V RS422_RX+ RS422_RX- NC/+5V/+12V...
  • Page 39 R S-485 Mode P in P in Name Sig nal Type Sig nal Level RS485_D- ±5V RS485_D+ ±5V NC/+5V/+12V +5V/+12V N o te 1: COM4 RS-232/422/485 can be set by BIOS. Default is RS-232. Chapter 2 – Hardware Information...

  • Page 40: Com1 Rs232 Pin Header (Cn17)

    2.4.14 COM1 RS232 Pin Header (CN17) P in P in Name Sig nal Type Sig nal Level ±5V ±5V ±5V RI/+5V/+12V IN/ PWR +5V/+12V Chapter 2 – Hardware Information...

  • Page 41: Com3 Rs232 Pin Header (Cn18)

    2.4.15 COM3 RS232 Pin Header (CN18) P in P in Name Sig nal Type Sig nal Level ±5V ±5V ±5V RI/+5V/+12V IN/ PWR +5V/+12V Chapter 2 – Hardware Information...

  • Page 42: Dio Pin Header (Cn24)

    2.4.16 DIO PIN HEADER ( CN24) P in P in Name Sig nal Type Sig nal Level DIO0 DIO1 DIO2 DIO3 DIO4 DIO5 DIO6 DIO7 N o te: Digital I/O port supports current up to 0.5A Chapter 2 – Hardware Information...

  • Page 43: Com4 Rs232 Pin Header (Cn26)

    2.4.17 COM4 RS232 Pin Header ( CN26) P in P in Name Sig nal Type Sig nal Level ±5V ±5V ±5V RI/+5V/+12V IN/ PWR +5V/+12V Chapter 2 – Hardware Information...

  • Page 44: Usb 3.0 Ports (Cn21 / Cn22)

    2.4.18 USB 3.0 Ports (CN21 / CN22) P in P in Name Sig nal Type Sig nal Level +5VSB USB_D- DIFF USB_D+ DIFF USB_SSRX0− DIFF USB_SSRX0+ DIFF USB_SSTX0− DIFF USB_SSTX0+ DIFF +5VSB USB_D- DIFF USB_D+ DIFF USB_SSRX1− DIFF USB_SSRX1+ DIFF USB_SSTX1−...

  • Page 45: Mini- Card Slot (Full-Mini Card) (Cn11)

    2.4.19 Mi ni-Card Slot ( Full-Mini Card) ( CN11) P in P in Name Sig nal Type Sig nal Level PCIE_WAKE# +V3.3S +3.3V +V1.5S +1.5V PCIE_CLK_REQ# UIM_PWR UIM_DATA PCIE_REF_CLK- DIFF UIM_CLK PCIE_REF_CLK+ DIFF UIM_RST UIM_VPP W_DISABLE# +3.3V PCIE_RST# +3.3V MSATA_RX- DIFF +V3.3S +3.3V...
  • Page 46 P in P in Name Sig nal Type Sig nal Level MSATA_RX+ DIFF +V1.5S +1.5V SMB_CLK +3.3V MSATA_TX- DIFF SMB_DATA +3.3V MSATA_TX+ DIFF USB_D- DIFF USB_D+ DIFF +V3.3S +3.3V +V3.3S +3.3V +V1.5S +1.5V Chapter 2 – Hardware Information...

  • Page 47: Lan (Rj-45) (Cn19 / Cn20)

    P in P in Name Sig nal Type Sig nal Level +3.3VSB +3.3V 2.4.20 L AN ( RJ-45) (CN19 / CN20) P in P in Name Sig nal Type Sig nal level MDI0+ DIFF MDI0- DIFF MDI1+ DIFF MDI2+ DIFF MDI2- DIFF MDI1-...

  • Page 48: Vga Port (Cn25)

    P in P in Name Sig nal Type Sig nal Level HDMI_D 1- DIFF HDMI_D0+ DIFF HDMI_D0- DIFF HDMI_CLK+ HDMI_CLK- HDMI_SCL HDMI_SDA +V5S 2.4.22 VG A Port (CN25) P in P in Name Sig nal Type Sig nal Level GREEN BLUE Chapter 2 –...
  • Page 49 P in P in Name Sig nal Type Sig nal Level +V5S CRT_PLUG DDC_DAT HSYNC VSYNC DDC_CLK Chapter 2 – Hardware Information...

  • Page 50: Cpu Installation

    2.5 CPU Installation Before beginning CPU Installation, ensure the system is shut down (not in rest or sleep mode) and the power cord is disconnected. Have the Intel Kaby Lake or Skylake-S FCLGA 1151 processor ready (max. TDP 35W). St ep 1: Remove the plastic cover from the CPU socket as shown below. Chapter 2 –...
  • Page 51 St ep 2: Place the CPU in the socket, lining up the tabs as shown. St ep 3: Place the bracket onto the standoffs. Make sure to align as shown. Chapter 2 – Hardware Information...
  • Page 52 St ep 4: Slide the cover as shown to fit the bracket onto the standoffs . St ep 5: Stick the sponge on the PCB in order to secure the metal cover. Notes regarding the benefits of the bracket: • Sp ecial Surface Treatment: The CPU bracket cover is treated with an electrophoretic deposition and insulation feature for better EMC protection.

  • Page 53: Chapter 3 - Bios Setup

    Chapter 3 Chapter 3 - BIOS Setup...

  • Page 54: System Test And Initialization

    System Test and Initialization These routines test and initialize board hardware. If the routines encounter an error during the tests, you will either hear a few short beeps or see an error message on the screen. There are two kinds of errors: fatal and non-fatal. The system can usually continue the boot up sequence with non-fatal errors.

  • Page 55: Ami Bios Setup

    3.2 AMI BIOS Setup AMI BIOS ROM has a built-in Setup program that allows users to modify the basic system configuration. This type of information is stored in battery-backed CMOS RAM and BIOS NVRAM so that it retains the Setup information when the power is turned off. Entering Setup Power on the computer and press <Del>or <ESC>...

  • Page 56: Setup Submenu: Main

    3.3 Se tup Submenu: Main Chapter 3 – BIOS Setup...

  • Page 57: Setup Submenu: Advanced

    3.4 Se tup Submenu: Advanced Chapter 3 – BIOS Setup...

  • Page 58: Cpu Configuration

    3.4.1 CPU Configuration Options summary: Intel (VMX) Disabled Virtualization Enabled Optimal Default, Failsafe Default Technology When enabled, a VMM can utilize the additional hardware capabilities provided by Vanderpool Technology. C states Disabled Enabled Optimal Default, Failsafe Default Enabled for Windows XP and Linux (OS optimized for Hyper-Threading Technology) and Disable for other OS (OS not optimized for Hyper-Threading Technology).

  • Page 59: Sata Configuration

    3.4.2 SATA Configuration Options summary: SATA Controller(s) Enabled Optimal Default, Failsafe Default Disabled Enable or disable SATA Device. SATA Mode AHCI Mode Optimal Default, Failsafe Default RAID Mode Determines how SATA controller(s) operate. Port 0 Disabled Enabled Optimal Default, Failsafe Default Enable or Disable SATA Port.

  • Page 60: Sio Configuration

    3.4.3 SIO Configuration Chapter 3 – BIOS Setup...

  • Page 61: Serial Port Config Uration

    3.4.3.1 Se ri al Port Configuration Options summary: Use This Device Disabled Enabled Optimal Default, Failsafe Default Enable or Disable Serial Port (COM) Possible: Use Automatic Settings Optimal Default, Failsafe Default IO=2F8; IRQ=3; IO=3F8; IRQ=4; Select an optimal setting for IO device mode RS232 Optimal Default, Failsafe Default...

  • Page 62: Hardware Monitor

    3.4.4 Hardware Monitor Options summary: Fan1 Smart Fan Manual RPM Mode control Manual Duty Mode Auto RPM Mode Optimal Default, Failsafe Default Auto Duty-Cycle Mode Chapter 3 – BIOS Setup...

  • Page 63: Cpu Smart Fan Mode Configuration

    3.4.4.1 CPU Sm art Fan Mode Configuration Manual RPM Mode Options summary: Manual Setting 3000 Optimal Default, Failsafe Default Set Fan at fixed RPM Chapter 3 – BIOS Setup...
  • Page 64 Manual Duty Mode Options summary: Manual Setting Optimal Default, Failsafe Default Set Fan at fixed Duty-Cycle Min=0 Max=100 Please input Dec number: Chapter 3 – BIOS Setup...
  • Page 65 Chapter 3 – BIOS Setup...

  • Page 66: Usb Configuration

    3.4.5 USB Configuration Options summary: Legacy USB Support Enabled Optimal Default, Failsafe Default Disabled Auto Enables BIOS Support for Legacy USB Support. When enabled, USB can be functional in legacy environment like DOS. AUTO option disables legacy support if no USB devices are connected Device Name (Emulation Auto Optimal Default, Failsafe Default...

  • Page 67: Digital Io Port Config Uration

    3.4.6 Di gital IO Port Configuration Options summary: DIO Port* Output Input Set DIO as Input or Output Output Level High Set output level when DIO pin is output Chapter 3 – BIOS Setup...

  • Page 68: Power Management

    3.4.7 Powe r Management Options summary: Power Mode ATX Type Optimal Default, Failsafe Default AT Type Select power supply mode. Restore on Power Last State Optimal Default, Failsafe Default Loss Power On Power Off Select power state when power is re-applied after a power failure. RTC wake system Disabled Optimal Default, Failsafe Default...

  • Page 69: Setup Submenu: Chipset

    3.5 Se tup Submenu: Chipset Chapter 3 – BIOS Setup...

  • Page 70: System Agent (Sa) Configuration

    3.5 .1 System Agent (SA) Configuration Options summary: Max TOLUD Dynamic Optimal Default, Failsafe Default 1 GB 1.25 GB 1.5 GB 1.75 GB 2 GB 2.25 GB 2.5 GB 2.75 GB 3 GB 3.25 GB Maximum Value of TOLUD Dynamic assignment would adjust TOLUD automatically based on largest MMIO length of installed graphic controller.
  • Page 71 PEG Port Gen Speed Auto Optimal Default, Failsafe Default Gen1 Gen2 Gen3 Configure PED 0:1:0 Max Speed Chapter 3 – BIOS Setup...

  • Page 72: Graphics Configuration

    3.5.1.1 G raphics Configuration Options summary: Primary Display Auto Optimal Default, Failsafe Default IGFX PCIE Select which of IGFX/PEG Graphics dvice should be Primary Display. Primary IGFX Boot VBIOS Default Optimal Default, Failsafe Default Display LVDS HDMI Select the Video Device which will be activated during POST. This has no effect if external graphic present.

  • Page 73: Lvds Panel Configuration

    3.5.1.2 LVDS Panel Configuration Options summary: LVDS Disabled Enabled Optimal Default, Failsafe Default Enable/Disabled this panel. LVDS Panel Type 640x480@60Hz 800x480@60Hz 800x600@60Hz 1024x600@60Hz 1024x768@60Hz Optimal Default, Failsafe Default 1280x768@60Hz 1280x800@60Hz 1280x1024@60Hz 1366x768@60Hz 1440x900@60Hz 1600x1200@60Hz 1920x1080@60Hz 1920x1200@60Hz Chapter 3 – BIOS Setup...
  • Page 74 Select LCD panel used by Internal Graphics Device by selecting the appropriate setup item. Color Depth 18-bit Optimal Default, Failsafe Default 24-bit 36-bit 48-bit Select panel type Backlight Type Normal Optimal Default, Failsafe Default Inverted Select backlight control signal type Backlight Level Optimal Default, Failsafe Default 100%...

  • Page 75: Pch-Io Configuration

    3.5.2 PCH-IO Configuration Options summary: Full-MiniCard Slot Function SATA Optimal Default, Failsafe Default PCIe Switch minicard slot function (Excluding H110 SKU) PCI Express Root Port 15 Disabled Enabled Optimal Default, Failsafe Default Control the PCIE root port PCIe Speed Auto Optimal Default, Failsafe Default Gen1 Gen2...

  • Page 76: Setup Submenu: Security

    3.6 Se tup Submenu: Security Change User/Administrator Password Y ou can set an Administrator Password or User Password. An Administrator Password must be set before you can set a User Password. The password will be required during boot up, or when the user enters the Setup utility. A User Password does not provide access to many of the features in the Setup utility.

  • Page 77: Setup Submenu: Boot

    3.7 Se tup Submenu: Boot Options summary: Quiet Boot Disabled Enabled Optimal Default, Failsafe Default En/Disable showing boot logo. Launch PXE OpROM Disabled Optimal Default, Failsafe Default Enabled Controls the execution of UEFI and Legacy PXE OpROm Chapter 3 – BIOS Setup...

  • Page 78: Bbs Priorities

    3.7.1 BBS Priorities Chapter 3 – BIOS Setup...

  • Page 79: Setup Submenu: Save & Exit

    3.8 Se tup Submenu: Save & Exit Chapter 3 – BIOS Setup...

  • Page 80: Chapter 4 - Drivers Installation

    Chapter 4 Chapter 4 – Drivers Installation...

  • Page 81: Driver Download And Installatio N

    Dri ver Download and Installation Drivers for the EPIC-KBS7 can be downloaded from the product page on the AAEON website by following this link: https://www.aaeon.com/en/p/epic-boards-epic-kbs7 Download the driver(s) you need and follow the steps below to install them. St ep 1 – Install Chipset Drivers Open the St ep 1 –...
  • Page 82 St ep 3 – Install LAN Driver Open the STEP3 – LAN (Intel_82579) folder and select your OS Open the .exe file in the folder Follow the instructions Drivers will be installed automatically St ep 4 – Install Audio Driver Open the STEP4 –...

  • Page 83: Appendix A - I/O Information

    Appendix A Appendix A - I/O Information...

  • Page 84: I/O Address Map

    I/O Address Map Appendix A – I/O Information...
  • Page 85 Appendix A – I/O Information...

  • Page 86: Memory Address Map

    A.2 Me m or y Address Map Appendix A – I/O Information...
  • Page 87 Appendix A – I/O Information...

  • Page 88: Irq Mapping Chart

    A.3 IRQ Mapping Chart Appendix A – I/O Information...
  • Page 89 Appendix A – I/O Information...

  • Page 90: Appendix B - Mating Connector Information

    Appendix B Appendix B – Mating Connector Information...

  • Page 91: Mating Connectors

    Mating Connectors Connector Mat ing Connector A vailable F unction Cab le P/N Lab el Cab le Vendor Mo del no LVDS Invertor CN 1 PHR-5 Connector +9~24V Vin CN 2 Power Cable 1702002010 Connector LVDS CN 3 HIROSE DF13-30DS-1.25C Connector External +5VSB Power...
  • Page 92 This page left intentionally blank. Appendix B – Mating Connector Information...

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