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Pin No.
Pin Name
65
O-DAB-PWR1.2V
66
O-DAB-PWR3.3V
67
RS
68
RESET
69
NC
70
O-SA_CLOCK
71
SA_SDA
72
NC
73
O-POWER_ON
74
NC
75
O-DSP_RESET
76
I-DSP_INT
77
IPOD_CP_DATA
78
IPOD_CP_CLK
79
I-KEY_INPUT
80
O-BUZZER
81
O-AMP_PWR
82
O-SW_STBY
83
DSP D3.3V_ON
84
DSP A3.3V_ON
85
I-AMP_TH-WARM
86
I-AMP_FAULT
87
O-AMP_HIZ
88
O-AMP_RESET
89
TOOL0
90
RESET
91
XT2
92
XT1
93
FLMD0
94
X2
95
X1
96
REGC
97
VSS
98
EVSS0
99
VDD
100
EVDD
I/O
Power supply on/off control signal output terminal for DAB tuner +1.2V power supply
O
Not used
Power supply on/off control signal output terminal for DAB tuner +3.3V power supply
O
Not used
O
Not used
O
Reset signal output to the liquid crystal display
-
Not used
O
I2C clock signal output to the wireless transceiver
I/O
Two-way I2C data bus with the wireless transceiver
-
Not used
O
Power supply on/off control signal output terminal for main power supply
-
Not used
O
Reset signal output to the digital audio processor "L": reset
I
Interrupt signal input from the digital audio processor
I/O
Two-way I2C data bus with the EEPROM
O
I2C clock signal output to the EEPROM
I
Power switch input terminal
O
Buzzer sound signal output terminal
O
Power supply on/off control signal output terminal
O
Standby signal output to the power control section
Power supply on/off control signal output terminal for +3.3V power supply (digital system)
O
"H": power on
Power supply on/off control signal output terminal for +3.3V power supply (analog system)
O
"H": power on
I
Thermal warming signal input from the digital power amplifi er
I
Fault signal input from the digital power amplifi er
O
Power down signal output to the digital power amplifi er
O
Reset signal output to the digital power amplifi er
-
Not used
System reset signal input from the reset signal generator
I
For several hundreds msec. after the power supply rises, "L" is input, then it change to "H"
O
Sub system clock signal output terminal (32.768 kHz)
I
Sub system clock signal input terminal (32.768 kHz)
I
Flash memory programming mode setting terminal
O
Main system clock signal output terminal (25 MHz)
I
Main system clock signal input terminal (25 MHz)
-
External capacitor connecting terminal of regulator output for internal operation
-
Ground terminal
-
Ground terminal
-
Power supply terminal (+3.3V)
-
Power supply terminal (+3.3V)
Description
"L": reset
Not used
"H": OK
"L": power down
"L": reset
"L": reset
ATS-SW10Ti
"H": power on
33
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