Sony KDL-32EX550 Service Manual page 19

Lcd digital color tv
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BAPS BOARD SCHEMATIC DIAGRAM (8 OF 14)
1
|
2
|
3
|
4
|
5
|
A
1
2
3
HDMI/LVDS
LVDS_VMID
CL2008
A
HDMI_CLK_P
C1 HDMI_CKP
Y25
HDMI_CLK_P
HDMI_CLK_N
C2 HDMI_CKM
HDMI_CLK_N
011:8C
HDMI_D0_P
D1 HDMI_RAP
LVDS_VS
AB25
011:8C
B
HDMI_D0_P
LVDS_HS
HDMI_D0_N
D2 HDMI_RAM
AC25
HDMI_D0_N
011:8B
HDMI_D1_P
E1 HDMI_RBP
HDMI_D1_P
011:8B
E2 HDMI_RBM
LVDSB_TP_4
011:8B
HDMI_D1_N
AD29
HDMI_D1_N
LVDSB_TM_4
HDMI_D2_P
F1
HDMI_RCP
AD30
HDMI_D2_P
011:8B
HDMI_D2_N
F2 HDMI_RCM
LVDSB_TP_3
AD28
+3.3V_MAIN
HDMI_D2_N
011:8B
LVDSB_TM_3
011:8B
AC28
LVDSB_CKP
AC30
R2401
47k
LVDSB_CKM
AC29
1/16W
CHIP
LVDSB_TP_2
5%
D5 HDMI_DDC_SDA
AB29
C
LVDSB_TM_2
E5 HDMI_DDC_SCL
AB30
B
LVDSB_TP_1
AB28
LVDSB_TM_1
+3.3V_MAIN
AA28
LVDSB_TP_0
AA30
D4 HDMI_DDC5V_IN
LVDSB_TM_0
AA29
JL2400
E4 HDMI_HOTP_DET
LVDSA_TP_4
Y29
LVDSA_TM_4
Y30
LVDSA_TP_3
Y28
D8 HDMI_PCKIN
LVDSA_TM_3
W28
D
LVDSA_CKP
C2406
W30
R2407
0 . 0 1 5
2 . 2 k
25V
1/16W
LVDSA_CKM
W29
X7R
1005
CHIP
R2403
5%
E12 HDMI_PFIL
LVDSA_TP_2
V29
0
C
+3.3V_MAIN
LVDSA_TM_2
V30
C2407
LVDSA_TP_1
V28
150p
GND_D
50V
D9 HDMI_DAOUT
LVDSA_TM_1
U28
CH
1005
LVDSA_TP_0
U30
Q2400
R2404
LVDSA_TM_0
U29
XX
1 . 5 k
1/16W
C2410
CHIP
0 . 1
E11 HDMI_BIASDA
C2401
C2400
R2400
5p
5%
16V
E
100p
XX
50V
X7R
1005
VDD33LVDS
V21
50V
CH
CH
1005
1005
GND_D
VDD33LVDS
V22
+3.3V_MAIN
C2013
GND_D
0 . 1
X7R
C7 AVDD33VPLLB
VDD12LVDS
Y21
1005
FB2400
H12 AVDD33VPLLB
VDD12LVDS
Y22
0
1608
J12 AVDD33VPLLB
C2408
0 . 1
D
16V
X7R
E9 AVSSVADC
GPIO35
1005
T26
D17 AVSSVADC
GPIO36
T27
+3.3V_MAIN
F
GPIO37
R26
GND_D
K9 VDD33HDMI
GPIO38
U26
K10 VDD33HDMI
GPIO39
FB2401
C2402
T25
0
0 . 1
1608
16V
D+1.2V
GPIO40
R25
X7R
1005
GPIO41
P25
GND_D
L9 VDD12HDMI
GPIO42
N25
FB2402
C2404
L10 VDD12HDMI
*FB2408
0
1kohm
0 . 1
1608
16V
X7R
1005
VSS
T28
GND_D
C3 HDMI_TOUTP
VSS
T29
G
E
D3 HDMI_TOUTM
VSS
T30
VSS
U27
VSS
V27
HDMI_REXT
VSS
F7
W27
VSS
Y27
LSI
VSS
VSS
B1
AA27
VSS
VSS
B2
AB27
E3
VSS
VSS
AC27
VSS
VSS
F3
AD27
VSS
H
G1
VSS
AE28
G2
VSS
VSS
AE29
GND_D
GND_D
F
2011/05/18 13:11
*IC9000
[ J I G ]
CXD4733GB
N O
Y E S
R B 2 0 1 1
X X
1 k
S 9 2 0 1
X X
1 7 7 1 0 5 6 2 1
I
G
J
K
H
From Main Chip/LVDS
L
M_LVDS-EVEN
M_LVDS-ODD
I
M
J
N
P l a c e t h e s e t e r m i n a t i o n r e s i s t o r s
near the Main Chip LVDS out
K
O
L
P
YYYY/MM/DD
HH:MM
AZ3F
6
|
7
|
8
|
9
|
10
|
11
|
4
5
6
7
8
FOR INTERFERENCE DPL
2011/05/18 13:11
[ STRAP ]
A E P _ S T D
A E P _ 2
U C
PA
J P
C H D
C 2 4 1 8
0 . 0 0 1
0 . 0 0 1
0 . 0 0 1
0 . 0 0 1
X X
0 . 0 0 1
5 0 V
5 0 V
5 0 V
50V
5 0 V
X 7 R
X 7 R
X 7 R
X7R
X 7 R
CL2009
C 2 4 1 9
0 . 0 0 1
0 . 0 0 1
0 . 0 0 1
0 . 0 0 1
X X
0 . 0 0 1
CL2010
5 0 V
5 0 V
5 0 V
50V
5 0 V
X 7 R
X 7 R
X 7 R
X7R
X 7 R
M_LVDS-EVEN
C 2 4 2 0
0 . 0 0 1
0 . 0 0 1
0 . 0 0 1
0 . 0 0 1
X X
0 . 0 0 1
M_LVDSEVEN4_P
5 0 V
5 0 V
5 0 V
50V
5 0 V
X 7 R
X 7 R
X 7 R
X7R
X 7 R
M_LVDSEVEN4_N
C 2 4 2 1
0 . 0 0 1
0 . 0 0 1
0 . 0 0 1
0 . 0 0 1
X X
0 . 0 0 1
5 0 V
5 0 V
5 0 V
50V
5 0 V
M_LVDSEVEN3_P
X 7 R
X 7 R
X 7 R
X7R
X 7 R
M_LVDSEVEN3_N
C 2 4 2 2
0 . 0 0 1
0 . 0 0 1
0 . 0 0 1
0 . 0 0 1
X X
0 . 0 0 1
5 0 V
5 0 V
5 0 V
50V
5 0 V
M_LVDSEVEN_CLK_P
X 7 R
X 7 R
X 7 R
X7R
X 7 R
M_LVDSEVEN_CLK_N
C 2 4 2 3
0 . 0 0 1
0 . 0 0 1
0 . 0 0 1
0 . 0 0 1
X X
0 . 0 0 1
5 0 V
5 0 V
5 0 V
50V
5 0 V
M_LVDSEVEN2_P
X 7 R
X 7 R
X 7 R
X7R
X 7 R
M_LVDSEVEN2_N
F B 2 4 0 3
1 k o h m
1 k o h m
1 k o h m
1ko h m
0
1 k o h m
F B 2 4 0 4
1 k o h m
1 k o h m
1 k o h m
1ko h m
0
1 k o h m
M_LVDSEVEN1_P
F B 2 4 0 5
1 k o h m
1 k o h m
1 k o h m
1ko h m
0
1 k o h m
M_LVDSEVEN1_N
F B 2 4 0 6
1 k o h m
1 k o h m
1 k o h m
1ko h m
0
1 k o h m
M_LVDSEVEN0_P
F B 2 4 0 7
1 k o h m
1 k o h m
1 k o h m
1ko h m
0
1 k o h m
F B 2 4 0 8
1 k o h m
1 k o h m
1 k o h m
1ko h m
0
1 k o h m
M_LVDSEVEN0_N
R 2 4 2 7
6 8
6 8
6 8
68
0
6 8
M_LVDS-ODD
1 / 1 6 W
1 / 1 6 W
1 / 1 6 W
1 / 1 6 W
1 / 1 6 W
C H I P
C H I P
C H I P
CHI P
C H I P
M_LVDSODD4_P
R 2 4 2 8
6 8
6 8
6 8
68
0
6 8
1 / 1 6 W
1 / 1 6 W
1 / 1 6 W
1 / 1 6 W
1 / 1 6 W
C H I P
C H I P
C H I P
CHI P
C H I P
M_LVDSODD4_N
R 2 4 2 9
6 8
6 8
6 8
68
0
6 8
M_LVDSODD3_P
1 / 1 6 W
1 / 1 6 W
1 / 1 6 W
1 / 1 6 W
1 / 1 6 W
C H I P
C H I P
C H I P
CHI P
C H I P
M_LVDSODD3_N
R 2 4 3 0
6 8
6 8
6 8
68
0
6 8
1 / 1 6 W
1 / 1 6 W
1 / 1 6 W
1 / 1 6 W
1 / 1 6 W
C H I P
C H I P
C H I P
CHI P
C H I P
M_LVDSODD_CLK_P
R 2 4 3 1
6 8
6 8
6 8
68
0
6 8
M_LVDSODD_CLK_N
1 / 1 6 W
1 / 1 6 W
1 / 1 6 W
1 / 1 6 W
1 / 1 6 W
C H I P
C H I P
C H I P
CHI P
C H I P
M_LVDSODD2_P
R 2 4 3 2
6 8
6 8
6 8
68
0
6 8
1 / 1 6 W
1 / 1 6 W
1 / 1 6 W
1 / 1 6 W
1 / 1 6 W
M_LVDSODD2_N
C H I P
C H I P
C H I P
CHI P
C H I P
R B 2 0 1 7
9 0
9 0
9 0
90
0
9 0
M_LVDSODD1_P
R B 2 0 1 8
9 0
9 0
9 0
90
0
9 0
M_LVDSODD1_N
R B 2 0 1 9
9 0
9 0
9 0
90
0
9 0
+3.3V_MAIN
M_LVDSODD0_P
R B 2 0 2 0
9 0
9 0
9 0
90
0
9 0
R B 2 0 2 1
9 0
9 0
9 0
90
0
9 0
M_LVDSODD0_N
R B 2 0 2 2
9 0
9 0
9 0
90
0
9 0
C2019 Atreyu
D+1.2V
C2014
0 . 1
+3.3V_MAIN
X7R
16V
For CWY_CCFL
GND_D
*R2412
XX
GND_D
GND_D
JL2000
X_PEM_RST/LUT_SEL2/X_FRC_RST
*FB2403 1kohm
*R2430 68
JL2001
009:8F
LUT_SEL1/X_TCON_RST/LR_FLAG
*FB2404 1kohm
*R2431 68
009:9G
S9201
JL2002
CVT2
1-692-881-41
SA_MODE/LUT_SEL0
009:8F
ASURA Alps
1-771-056-21
CVT2
DL_CS
*FB2405 1kohm
*R2432 68
UARTD_TX/FE_TX_PEM_RX
*R2459 0
002:3L;009:8E
DL_CLK
2011/05/18 13:11
UARTD_RX/FE_RX_PEM_TX
[ DIVX ]
*R2460 0
002:3L;009:8E
DL_DO
JL2003
FRC_PWR_CTRL
002:10D;009:9F
Y E S
N O
*R2458 0
*FB2406 1kohm
*R2429 68
JL2004
I C 9 0 0 0
CXD4727GB
CXD4733GB
PEM_WDT/XBUSY/BINT 009:9G
10k
JL2401
*FB2407 1kohm
*R2428 68
JL2005
R2020
UARTD_TX/FE_TX_PEM_RX
*R2481 0
*R2427 68
UARTD_RX/FE_RX_PEM_TX
C2425
GND_D
*R2482 0
22p
PEM_LOG_RX
P-E3 model Backup Cir.
PANEL_PWR
*R2483 0
002:9B;008:3B
PEM_LOG_TX
*R2484 0
C2424
For ATL/WXGA
22p
+3.3V_MAIN
*R2411
GND_D
XX
DIMMER1_AYU
For ATL
R2410
*R2498
1k
0
0
*R2423
A(DIMMER_SEL) L:Ch0(Dimmer_AYU)
DIMMER_DC_AYU
*R2499
MODE_PEM/TCON_RDY
0
H:Ch1(EL_TIM)
002:3L;009:9F;009:12K
DIMMER1
*R2486XX
DIMMER_DC
DIMMER_SEL
A
CH0
*R2487XX
EL_TIM
*R2488XX
Vcc
GND
GND_D
GLS_CTRL1
*R2489XX
COMMON
CH1
GLS_CTRL2
*R2490XX
EMI_FAIL
*IC2401
XX
TC7PA53FU(TE85L.F)
*R2491XX
SA_MODE/LUT_SEL0
X_PEM_RST/LUT_SEL2/X_FRC_RST
C2020
0 . 0 1
25V
FRC_PWR_CTRL
X7R
GND_D
1005
MODE_PEM/TCON_RDY
LUT_SEL1/X_TCON_RST/LR_FLAG
PEM_WDT/XBUSY/BINT
I2CC_SCL
LVDS
(CLK
1mm
I2CC_SDA
A t r e y u
CN2001
100
CN2001
0
90
M_LVDSEVEN4_P
RB2003
*RB2017
JL2006
M_LVDSEVEN4_N
JL2007
JL2008
M_LVDSEVEN3_P
JL2009
M_LVDSEVEN3_N
PP
WXGA XX
M_LVDSEVEN_CLK_P
0
FHD M't
90
RB2004
*RB2018
JL2010
M_LVDSEVEN_CLK_N
JL2011
M_LVDSEVEN2_P
JL2012
JL2013
M_LVDSEVEN2_N
0
90
M_LVDSEVEN1_P
RB2005
*RB2019
JL2014
JL2015
M_LVDSEVEN1_N
M_LVDSEVEN0_P
JL2016
JL2017
M_LVDSEVEN0_N
0
90
M_LVDSODD4_P
RB2000
*RB2020
JL2018
M_LVDSODD4_N
JL2019
M_LVDSODD3_P
JL2020
JL2021
M_LVDSODD3_N
0
90
M_LVDSODD_CLK_P
RB2001
*RB2021
JL2022
M_LVDSODD_CLK_N
JL2023
JL2024
M_LVDSODD2_P
JL2025
M_LVDSODD2_N
M_LVDSODD2_N
PP
0
90
M_LVDSODD1_P
M_LVDSODD1_P
RB2002
*RB2022
JL2026
M_LVDSODD1_N
JL2027
JL2028
M_LVDSODD0_P
JL2029
M_LVDSODD0_N
M_LVDSODD0_N
CMD RB
Mt
RB 0
1-234-400-21
CN2000
BM11 Pana(
) 1-457-685-11
Atreyu
BM10 Pana(
) 1-460-416-11
For FHD Capture
BM10 Murata 1-457-539-11
JL2030
JL2031
JL2032
JL2033
JL2034
GND_D
12
|
13
|
14
|
15
|
16
|
17
9
10
11
12
FOR TCON DPL
2011/05/18 13:11
T W
H K
B R
[ SEG ]
0 . 0 0 1
0 . 0 0 1
0 . 0 0 1
5 0 V
5 0 V
5 0 V
A T L
CWY_LED
CWY_CCFL
WXG A _ N F R
X 7 R
X 7 R
X 7 R
C N 2 0 0 0
X X
X X
X X
30P
0 . 0 0 1
0 . 0 0 1
0 . 0 0 1
C N 2 0 0 1
017558801(CPT only)
5 1 P
5 1 P
XX
5 0 V
5 0 V
5 0 V
G R Y
G R Y
X 7 R
X 7 R
X 7 R
I C 2 4 0 1
X X
X X
TC7PA53FU(TE85L.
XX
0 . 0 0 1
0 . 0 0 1
0 . 0 0 1
R 2 0 2 8
X X
X X
X X
XX
5 0 V
5 0 V
5 0 V
X 7 R
X 7 R
X 7 R
R 2 0 2 9
0
0
0
XX
0 . 0 0 1
0 . 0 0 1
0 . 0 0 1
5 0 V
5 0 V
5 0 V
X 7 R
X 7 R
X 7 R
C H I P
C H I P
C H I P
R 2 0 3 0
0
X X
X X
XX
0 . 0 0 1
0 . 0 0 1
0 . 0 0 1
5 0 V
5 0 V
5 0 V
C H I P
X 7 R
X 7 R
X 7 R
R 2 0 3 8
0
X X
X X
XX
0 . 0 0 1
0 . 0 0 1
0 . 0 0 1
C H I P
5 0 V
5 0 V
5 0 V
R 2 0 3 9
X X
0
0
0
X 7 R
X 7 R
X 7 R
C H I P
C H I P
CHI P
1 k o h m
1 k o h m
1 k o h m
R 2 4 1 1
X X
X X
0
XX
1 k o h m
1 k o h m
1 k o h m
C H I P
1 k o h m
1 k o h m
1 k o h m
R 2 4 1 2
X X
X X
0
XX
1 k o h m
1 k o h m
1 k o h m
C H I P
1 k o h m
1 k o h m
1 k o h m
R 2 4 2 3
1 k
X X
X X
XX
1 k o h m
1 k o h m
1 k o h m
1 / 1 6 W
C H I P
6 8
6 8
6 8
R 2 4 5 8
0
X X
X X
XX
1 / 1 6 W
1 / 1 6 W
1 / 1 6 W
C H I P
C H I P
C H I P
C H I P
C H I P
6 8
6 8
6 8
1 / 1 6 W
1 / 1 6 W
1 / 1 6 W
R 2 4 5 9
0
X X
X X
XX
C H I P
C H I P
C H I P
C H I P
C H I P
6 8
6 8
6 8
1 / 1 6 W
1 / 1 6 W
1 / 1 6 W
R 2 4 6 0
0
X X
X X
XX
C H I P
C H I P
C H I P
C H I P
C H I P
6 8
6 8
6 8
1 / 1 6 W
1 / 1 6 W
1 / 1 6 W
R 2 4 6 5
X X
X X
X X
XX
C H I P
C H I P
C H I P
C H I P
6 8
6 8
6 8
1 / 1 6 W
1 / 1 6 W
1 / 1 6 W
R 2 4 6 6
X X
X X
X X
XX
C H I P
C H I P
C H I P
C H I P
6 8
6 8
6 8
1 / 1 6 W
1 / 1 6 W
1 / 1 6 W
R 2 4 6 7
0
0
0
0
C H I P
C H I P
C H I P
C H I P
C H I P
C H I P
C H I P
CHI P
9 0
9 0
9 0
R 2 4 6 8
0
0
0
0
9 0
9 0
9 0
C H I P
C H I P
C H I P
CHI P
9 0
9 0
9 0
R 2 4 6 9
0
0
0
0
9 0
9 0
9 0
C H I P
C H I P
C H I P
CHI P
9 0
9 0
9 0
R 2 4 8 1
0
X X
X X
XX
9 0
9 0
9 0
C H I P
R 2 4 8 2
0
X X
X X
XX
C H I P
R 2 4 8 3
0
X X
X X
XX
C H I P
009:12G;009:15B
PANEL_CTRL09
R 2 4 8 4
0
X X
X X
XX
C H I P
009:12G;009:15B
R 2 4 8 6
X X
0
0
XX
PANEL_CTRL08
C H I P
C H I P
R 2 4 8 7
X X
0
0
XX
0 0 9 : 1 2 I
C H I P
C H I P
PANEL_ODD3_P
0 0 9 : 1 2 I
R 2 4 8 8
X X
0
0
XX
PANEL_ODD3_N
C H I P
C H I P
R 2 4 8 9
X X
0
0
XX
0 0 9 : 1 2 J
C H I P
C H I P
PANEL_ODD_CLK_P
For ATL
R 2 4 9 0
X X
0
0
XX
PANEL_ODD_CLK_N
0 0 9 : 1 2 J
C H I P
C H I P
R 2 4 9 1
X X
0
0
XX
0 0 9 : 1 2 J
PANEL_ODD2_P
C H I P
C H I P
0 0 9 : 1 2 J
R 2 4 9 8
0
X X
X X
0
PANEL_ODD2_N
For ATL
C H I P
CHI P
R 2 4 9 9
0
X X
X X
0
0 0 9 : 1 2 J
PANEL_ODD1_P
C H I P
CHI P
0 0 9 : 1 2 J
R B 2 0 0 8
0
0
0
XX
PANEL_ODD1_N
R B 2 0 0 9
0
0
0
XX
R B 2 0 1 0
0
0
0
XX
0 0 9 : 1 2 J
PANEL_ODD0_P
0 0 9 : 1 2 J
PANEL_ODD0_N
009:12G;009:15C
PANEL_CTRL11
For CWY
009:12G;009:15C
PANEL_CTRL12
GND_D
For CWY
For ATL/CWY
*R2029 0
For ATL
*R2030 0
F o r N o t h i n g
*R2028XX
F o r N o t h i n g
PANEL_CTRL01
009:15B
PANEL_CTRL02
*R2465XX
009:15B
PANEL_CTRL03
009:15B
PANEL_CTRL04
009:15B
PANEL_CTRL05
*R2466XX
009:15B
PANEL_CTRL06
009:15B
PANEL_CTRL07
P a n e l C o n t r o l S i g n a l
009:15B
For ALL
PANEL_CTRL08
009:13D;009:15B
PANEL_CTRL09
*R2467 0
009:13D;009:15B
PANEL_CTRL10
009:15B
PANEL_CTRL11
*R2468 0
009:13E;009:15C
PANEL_CTRL12
*R2469 0
009:13F;009:15C
For ATL
P a n e l C o n t r o l S i g n a l
MODE_PEM/TCON_RDY
PANEL_CTRL13
*R2038 0
009:15E
For CWY/WXGA
GND_D
PANEL_EVEN4_P
009:15C
PANEL_EVEN4_N
009:15C
PANEL_EVEN3_P
009:15C
PANEL_EVEN3_N
009:15C
PANEL_EVEN_CLK_P
009:15C
PANEL_EVEN_CLK_N
LVDS Signal EVEN
009:15C
PANEL_EVEN2_P
009:15C
PANEL_EVEN2_N
009:15D
PANEL_EVEN1_P
009:15D
PANEL_EVEN1_N
009:15D
PANEL_EVEN0_P
009:15D
PANEL_EVEN0_N
009:15D
PANEL_ODD4_P
009:15D
PANEL_ODD4_N
009:15D
PANEL_ODD3_P
009:13D
PANEL_ODD3_N
009:13D
PANEL_ODD_CLK_P
009:13E
PANEL_ODD_CLK_N
LVDS Signal ODD
009:13E
PANEL_ODD2_P
009:13E
PANEL_ODD2_N
009:13E
PANEL_ODD1_P
009:13E
PANEL_ODD1_N
009:13E
PANEL_ODD0_P
009:13E
PANEL_ODD0_N
009:13E
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18
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19
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20
|
21
|
22
|
23
13
14
15
16
P a n e l C o n t r o l l i s t
FHD Connector
R i g h t A n g l e
CWY
ATL
1 2 0 H z / 1 0 b i t
2 40 Hz / 1 0 b i t
*CN2001
017558801
CTRL1
PEM_DL_CS
PANEL_CTRL01
009:12G
1
PANEL CTRL01
CTRL2
EMI_FAIL
PEM_LOG_RX
PANEL_CTRL02
009:12G
2
PANEL CTRL02
CTRL3
GLS_CTRL2
PEM_DL_CLK
009:12G
PANEL_CTRL03
3
PANEL CTRL03
CTRL4
GLS_CTRL1
PEM_RESET_X
PANEL_CTRL04
009:12G
4
PANEL CTRL04
CTRL5
PEM_DL_SI
PANEL_CTRL05
009:12G
CTRL6
SA_MODE
5
PANEL CTRL05
009:12G
PANEL_CTRL06
6
PANEL CTRL06
CTRL7
DC_DIMMER
PEM_LOG_TX
PANEL_CTRL07
009:12G
7
PANEL CTRL07
CTRL8
EL_TIM
PEM_RX
PANEL_CTRL08
009:12G;009:13D
CTRL9
BINT(WP)
BINT/PEM_WDL
8
PANEL CTRL08
JL2035
PANEL_CTRL09
009:12G;009:13D
9
PANEL CTRL09
CTRL10
PWM_DIMMER
PEM_TX
PANEL_CTRL10
009:12G
10
PANEL CTRL10
CTRL11
SDA
PANEL_CTRL11
009:12G;009:13E
11
PANEL CTRL11
CTRL12
SCL
PANEL_CTRL12
009:12G;009:13F
12
PANEL CTRL12
CTRL13
GND
MODE_PEM
13
GND
009:12H
PANEL_EVEN4_P
14
RX4P_EVEN
009:12H
PANEL_EVEN4_N
15
RX4N_EVEN
009:12H
PANEL_EVEN3_P
16
RX3P_EVEN
009:12H
PANEL_EVEN3_N
17
RX3N_EVEN
WXGA Connector (FFC)
R i g h t A n g l e
18
GND
009:12H
PANEL_EVEN_CLK_P
19
RXCLKP_EVEN
30P
XX
*CN2000
184208811
0 0 9 : 1 2 I
PANEL_EVEN_CLK_N
20
RXCLKN_EVEN
1
POWER
21
GND
0 0 9 : 1 2 I
2
POWER
PANEL_EVEN2_P
22
RX2P_EVEN
3
POWER
0 0 9 : 1 2 I
PANEL_EVEN2_N
23
RX2N_EVEN
0 0 9 : 1 2 I
4
POWER
PANEL_EVEN1_P
24
RX1P_EVEN
5
POWER
0 0 9 : 1 2 I
PANEL_EVEN1_N
25
RX1N_EVEN
6
NC
0 0 9 : 1 2 I
PANEL_EVEN0_P
26
RX0P_EVEN
0 0 9 : 1 2 I
7
GND
PANEL_EVEN0_N
27
RX0N_EVEN
8
GND
28
GND
9
BINT
0 0 9 : 1 2 I
P l a c e t h e s e r e s i s t o r s
PANEL_ODD4_P
29
RX4P_ODD
near the WXGA Connector
10
NC
0 0 9 : 1 2 I
PANEL_ODD4_N
30
RX4N_ODD
11
PANEL_SEL(NOT USE)
31
RX3P_ODD
12
GND
32
RX3N_ODD
13
RX3+
33
GND
14
RX3-
34
RXCLKP_ODD
15
GND
35
RXCLKN_ODD
16
RXCLK+
*RB2008
36
GND
0
17
RXCLK-
37
RX2P_ODD
18
GND
38
RX2N_ODD
19
RX2+
39
RX1P_ODD
20
RX2-
40
RX1N_ODD
21
GND
41
RX0P_ODD
22
RX1+
*RB2009
0
42
RX0N_ODD
23
RX1-
43
GND
24
GND
009:12K
44
GND
25
RX0+
PANEL_CTRL13
45
PANEL CTRL13
26
RX0-
46
NC(GND)
27
GND
PANEL_VCC_SW
47
POWER
28
SDA
*RB2010
0
0uH
48
POWER
29
SCL
FB2004
49
POWER
30
NC
50
POWER
51
POWER
C2021
C2022
XX
XX
GND_D
GND_D
To LVDS Connector
Ref:2000-2499
ORIGINAL
MODEL
BAPS/BAPW MOUNT
DESCRIPTION
HDMI/LVDS/PANEL(CONNECTOR)
PART NO.
SHEET
BAPS
A L L r e s i s t o r s a r e i n o h m s , W u n l e s s o t h e r w i s e n o t e d .
8/14
A L L c a p a c i t o r s a r e i n u F ( p ; p F ) u n l e s s o t h e r w i s e n o t e d .
AZ3F
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