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To connect the devices VDD pins to the VDD lane of the board place a 0 Ohm resistor on the SMD2 pad and place
a 100 nF buffering capacitor on the SMD1 pad.
6.2.2 REGC pin
A buffering capacitor between the devices REGC pin(s) and VSS should be placed. Assemble the capacitor to the
SMD1 pad field.
Refer to the Fx3 User's Manual and Table 6-3 for the location of the RECC pin on the different devices.
Signal
FE3
VDD
4
n/a
VDD1
AVREF0
1
AVREF1
n/a
33
EVDD
n/a
n/a
BVDD
n/a
Table 6-2
Figure 6-6
Signal
FE3
REGC
5
REGC1
n/a
Table 6-3
- 22 -
NEC Electronics (Europe) GmbH
Fx3 pinning
FF3
FG3
FJ3
9
9
n/a
n/a
n/a
1
1
n/a
n/a
n/a
31
34
34
n/a
5
n/a
n/a
n/a
n/a
70
104
VDD signal connection
VDD
C
VSS
Device
signal
REGC pin components
Fx3 pinning
FF3
FG3
FJ3
10
10
10
n/a
n/a
n/a
REGC signal connection
FK3
9
9
126
1
1
45
47
5
5
77
128
FK3
10
125
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