Table 8-5: Hardware Power Save/Gpio0 Operation; Table 8-6: Software Power Save Mode Selection - Epson S1D13704 Technical Manual

Embedded memory color lcd controller
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Page 58
REG[03h] Mode Register 2
Address = FFE3h
Look-Up
n/a
Table Bypass
bit 7
bit 3
bit 2
bits 1-0
S1D13704
X26A-A-001-04
n/a
n/a
Look-Up Table Bypass
When the Look-Up Table Bypass bit = 0, the Green Look-Up Table is used for display
data output in gray shade modes. When this bit = 1, the Look-Up Table is bypassed for dis-
play data output in gray shade modes (for power save purposes). See "Look-Up Table
Architecture" on pag e72.
There is no effect on changing this bit in color modes. In color display mode the Look-Up
Table cannot be bypassed.
LCDPWR Override
This bit is used to override the panel on/off sequencing logic. When this bit = 0, LCDPWR
and the panel interface signals are controlled by the sequencing logic. When this bit 1,
LCDPWR is forced to off and the panel interface signals are forced low immediately upon
entering power save mode. See Section 7.3.2, "Power Down/Up Timing" on page 36 for
further information.
Hardware Power Save Enable
When this bit = 1 GPIO0 is used as the Hardware Power Save input pin. When this bit = 0
GPIO0 operates normally.

Table 8-5: Hardware Power Save/GPIO0 Operation

Hardware Power
RESET#
Save Enable
State
REG[03h] bit 2
0
X
1
0
1
0
1
0
1
1
Software Power Save Bits [1: 0]
These bits select the Power Save Mode as shown in the following table.

Table 8-6: Software Power Save Mode Selection

Bit 1
Bit 0
0
0
0
1
1
0
1
1
Hardware
LCDPWR
Power Save
Override
Enable
*
GPIO0
GPIO0 Config
Status/Control
REG[18h] bit 0
REG[19h] bit 0
X
X
0
reads pin status
1
0
1
1
X
X
Mode
Software Power Save
reserved
reserved
Normal Operation
Epson Research and Development
Vancouver Design Center
Read/Write
Software
Software
Power Save
Power Save
Bit 1
Bit 0
GPIO0 Operation
GPIO0 Input
(high impedance)
GPIO0 Output = 0
GPIO0 Output = 1
Hardware Power Save
Input (active high)
Hardware Functional Specification
Issue Date: 01/02/08

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