Receive Audio Circuits - Motorola MCS 2000 Service Instructions Manual

Dual Tone
Multiple
Frequency (DTMF)
Data
MDC Data
Receive Audio
Circuits
Squelch Detect
these signals may also pass through a data pre-emphasis block in the ASFIC.
Also these signalling schemes are based on sending a combination of 1200 Hz
and 1800 Hz tones only. Microphone audio is muted during High Speed Data
signalling.
DTMF data is a dual tone waveform used during phone interconnect
operation. It is the same type of tones which are heard when using a "Touch
Tone" telephone.
There are seven frequencies, with four in the low group (697, 770, 852, 941 Hz)
and three in the high group (1209, 1336, 1477 Hz).
The high-group tone is generated by the µP (U0103-74 /U0003-B4) strobing
U0200-G1 at six times the tone frequency for tones less than 1440 Hz or twice
the frequency for tones greater than 1440 Hz. The low group tone is generated
by the µP (U0103-73/U0003-C4) strobing U0200-G2 (DTMF CLOCK) at six
times the tone frequency. Inside U0200 the low-group and high-group tones
are summed (with the amplitude of the high group tone being approximately
2 dB greater than that of the low group tone) and then pre-emphasized before
being routed to the summer and splatter filter. The DTMF waveform then
follows the same path as was described for high-speed data.
The MDC signal follows exactly the same path as the DTMF high group tone.
MDC data utilizes MSK modulation, in which a logic zero is represented by
one cycle of a 1200 Hz, and a logic one by 1.5 cycles of an 1800 Hz. To generate
the data, the microcontroller first programs the ASFIC (U0200) with TXSG1
and TXSG0 control lines to the proper filter and gain settings. It then begins
strobing U0200/Trunking Clock In with a pulse every time there should be a
transition in the MDC waveform. The output waveform from U0200's 5-3-2
State Encoder is then fed to the post-limiter summer block and then the
splatter filter. From that point it is routed through the modulation attenuators
and then out of the ASFIC to the RF board. Microphone audio is muted during
MDC signalling.
(Refer to Figure 7-4 for reference for the following sections)
The radio's RF circuits are constantly producing an output at the discriminator.
In addition to the raw discriminator signal DISC (IF1-3-2-1), the RF board's
Zero IF IC also provides a separate buffered version of the discriminator signal
that is dedicated to the ASFIC's squelch detect circuitry SQUELCH (IF1-2-17-
1). This signal enters the controller board and is routed to the ASFIC on
U0200-H7. All of the squelch detect circuitry is contained within the ASFIC.
Therefore from a user's point of view, SQUELCH enters the ASFIC, and the
ASFIC produces to CMOS logic outputs based on the result. They are CH ACT
(U0200-H1) and SQ DET (U0200-H1).
The squelch signal entering the ASFIC is amplified, filtered, attenuated, and
rectified. It is then sent to a comparator to produce an active high signal on
CH ACT. A squelch tail circuit is used to produce SQ DET (U0200-H1) from CH
ACT. The state of CH ACT and SQ DET is high (logic 1) when carrier is
detected, otherwise low (logic 0). Both CH ACT and SQ DET are routed to the
SLIC (U0104-F4/H1).
Controller Section Theory of Operation 7-21