Circuit Description - Samsung SF-830 Service Manual

3

3. Circuit Description

• Main B'D
3-1 Main PBA
3-1-1 SUMMARY
The main circuit that consists of CPU, MFP controller (built-in 32bit RISC processor core: ARM7TDMI) including various I/O
device drivers, system memory, scanner, printer, motor driver, PC I/F, and FAX transceiver controls the whole system. The
entire structure of the main circuit is as follows :
OSC
20 MHz
POWER
ON RESET
IMCS
/MIR0,
/RD,/WR
MODEM
D0~D7
A0~A4
RST_OUT
/RST_OUT
/XDACK
/XDREQ
CIP3 /SDIP CS
/RD,/WR
D0~D15
A0~A5
ID01 ~ ID15
OD0 ~ OD15
RA0 ~ RA15
/CS
PM-22
CLOCK
/RD
NOR
OSC.(Video)
45.3928 MHz
LIU
Samsung Electronics
PLL
ARM7TDMI
Cache 8KB
Reset & WDT
Generation
A/D BUS
ROM/SRAM/
FLASH ROM
Control
(4 Bank)
I/O
CPU BUS
Control
Interface Block
(5 Bank)
IOCS
GPIO
Interrupt
Control
(4 External)
Timer
(3 CH)
SYSTEM BUS
Interface Block
[Arbiter]
Tone
Generator
UART
(3 CH)
VIS
JBIG
Engine
Comm. I/F
LRAM:1296B
ADC
CXRAM:256B
RAM : 512B
PROGRAM
ROM
1MB x 4EA
/CS,/RD,/WR
MA
EDO/FPM
MD
DRAM
RAS
Control
CAS
(4 Bank)
GEU
PVC
PPI
DMAC
(2 CH)
HCT
OSC.
INTERFACE IC
48 MHz
HPVC
RAM
512B+512B
<Block Diagram>
CIRCUIT DESCRIPTION
DATA RAM DATA RAM
SRAM
(DRAM) (DRAM)
256K
8MB x 2EA 2MB x 2EA
RTC
PARALLEL
INTERFACE
OPE PANEL
INTERFACE
USB
USB
(UNICON)
Repair Manual
3-1