Using Memory Ras Feature - NEC express5800 A2010b User Manual

Chapter 2 Preparations

1.14.6 Using Memory RAS Feature

The server has RAS feature including "Independent", "Independent + Rank Sparing", "Independent + Mirroring",
"Lock Step, "Lock Step + Rand Sparing", "Lock Step + Mirroring", and "Memory Scrubbing" modes.
The server has two memory controllers per a processor. A memory controller and a memory riser are connected
one-to-one. The memory riser has eight DIMMs and two memory buffers, and 4 memory channels for controlling
memory.
Memory Riser #1
DIMM #1
DIMM #2
DIMM #5
DIMM #6
CH0
Memory Buffer #1
SMI0
(1)
Independent mode
In this mode, the four memory channels operate independently. It supports ECC correction (64-Bit Data + 8-Bit
ECC) and SDDC (Single Device Data Correction) that corrects an error to a single DRAM.
Memory performance is higher than LockStep mode (*1), however, RAS feature is rather poor.
194
•
Note Refer to List of features supported by additional memory board in 1.14.3 Memory
RAS Feature before using memory RAS feature.
•
Only the features that additional memory board support can be used.
DIMM #3
DIMM #4
DIMM #7
DIMM #8
CH1 CH2 CH3
Memory Buffer #2
SMI1
Memory Controller #1
Note Use NE3302-H010F/H011F/H012F/H013F additional memory for Independent mode.
Express5800/A1040b, A2040b, A2020b, A2010b User's Guide
1. Installing / Removing Internal Options
Memory Riser #2
DIMM #1
DIMM #2
DIMM #5
DIMM #6
CH0 CH1
Memory Buffer #1
SMI2
Memory Controller #2
Processor
DIMM #3
DIMM #4
DIMM #7
DIMM #8
CH2 CH3
Memory Buffer #2
SMI3