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HD6809P/MC6809L
Micro
Processing
MTU:
Pin
(1)
arrangement
Non-Mukabln
lnwrum
| \ ¢ " U 9 K
Pm
Immun:
=~=
Bus Avlxiauiq
Addrusi
(2)
The
function
of
*
Power
ground
Two
pins
are
O
volts,while
'
Address
DUS(AOA¢Al5)
*
Sixteen
pins
the
Adress
onto
data
transfer,
a
This
is
the
"dummy
All
rising
edge
ofQ.
c *
*
\.J\.L\-bJ\4l¢
LJIJJ
FXVQL
load
four
TTL
or
*
Data
Bus
(D-o/D7)
eiggt
These
data
bus.
Each
loads,
and
typically
*
Read/Write(R/W)
This
signal
indicates
bus.
indicates
A
Low
is
R/W
made
high
rising
edge
of
R ‹ S ‹ t ( R E S ;
*
level
A
Low
on
will
cycle
reset
TFSEl6and FFFFl6
initial
power
oscillator
is
the
HD6809
Because
threshold
voltage
Unit
GND------~-----V"
ll
NMI
-----
-
------
E
RMIUMI
I
RQ
~"' -
'-"~~
B
Request
FIRQ
-~--~~~--~-
¢-|
B5
n
BA
B
--
--------
*
B15
V)
---~--------
'
,
___
HD6809p
A2
IE
(MPU)
A3
m
A4
A5
eu!
<
m
A.
'B
A
E
AU
'
A9"
AW
@
m
A"
\A'1EE
each
pin.
(Vcc,Vss)
used
to
supply
power
is
+5.0
+/-
Vcc
V
d
to
out
ut
are
use
p
When
the
Bus.
processor
it
will
t
t
ou
pu__a
access"
VMA
or
address
drivers
bus
is
" = i l a b l e ( B A )
High.
and
LS
TTL
loads,
'd
nication
pins
provi
e
commu
will
pin
drive
one
l3OpF.
th
direction
e
that
the
MPU
impedance
when
BA
Q.
this
Schmitt
trigger
the
The
MPU.
Reset
when
Acknowledge
Interrupt
the
line
Reset
on,
fully
operational.
Reset
pin
has
higher
than
that
YD
1
E51 HA|_r'-._--._
..-.
__
H,"
xYAL_
_____
___
_____
__
gg]
SXTAL
_____En
_______
gig
___
____
_____R___t
ss
Mm-,Y
........
-.-..M.m.,,
Q
_ _ _ _ _ _ _ _ _ _ _
__
__
uu______w_
..
._
"'
'Z
"
""
" " " "
E
'
" "
ommanso-
-~--DumMemoryAmer/au.Requen
~--Dum
_
3|
Do
W
EE
Dv
D2
D3
Dua
nu,
D.
Ds
E
Ds
E!o1)
@
AIS
m
A14
AddrnuEus
n|Au
the
to
part;
Vss
5%.
information
address
does
require
not
ddress
R/W-
FFFF
-
16,
Address
cycle.
are
made
high
impedance
are
drive
Each
pin
will
typically
9OpF.
with
the
system
load
Schottky
TTL
of
data
transfer
is
data
writing
onto
is
High.
R/W
is
valid
input
for
greater
fetched
vectors
are
'
true,(BA.BS-l).
is
should
be
held
Low
Schmitt
trigger
a
peripherals,
standard
of
G y m
Icwnd
,.,,_,,
nabh
Memory
Amer/au.
Requen
is
ground
or
the
bus
for
High,and
BS=Low
valid
the
on
when
Shottky
one
bi-directional
four
LS
TTL
or
the
data
on
the
data
bus.
the
on
than
bus
one
from
locations
'_
Din
-
ur
g
until
the
clock
input
with
a
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