Toshiba D-VR3SU Service Manual page 128

Circuit Operating Descriptions
7-9 VCR Video
(1) Luminance Signal Recording System
VIDEO 1N
28
VIDEO OUT
26
clock
53
data
54
chip select
55
REC COLOR
1) Outline
Fig. 7-18 shows the video signal recording system.
The selected video input signal goes to pin 28 of Luma/Chroma processor IC (IC301). And then it enters VIDEO
AGC circuit. The gain of AGC circuit is controlled by AGC detector so that the output is constant (approx. 2Vp-p).
The output signal of AGC is clamped by the FBC(Feed Back Clamp) circuit. This signal appears at pin 26, after
being amplified at the internal video amp and driver.
The output signal from the clamp circuit enter the detail enhancer circuit. In the detail enhancer circuit, the low
level high frequency video signal is emphasized to improve the original signals frequency characteristics.
onlinear emphasis circuit is employed to improve S/N and frequency response characteristics together with the
following main emphasis. Noise effects the FM wave at a higher frequency, so the S/N can be improved by
emphasizing the higher frequency before recording and by suppressing the play signal during demodulation.
The difference of non linear emphasis from main emphasis is that the emphasis characteristics change is depend-
ing on the input level. The gain of the emphasis circuit is inversely proportional to the level of the high frequency
component of the signal. That is, if the high frequency portion of the signal is low the main emphasis circuit will
amplify the signal.
7-28
AGC
DET
VIDEO F. B
AGC CLAMP
6dB QV/QH
AMP INSERT
FM MAIN
MOD EMPH
REC W/D
FM EQ CLIP
FM
AGC
+
69
Fig. 7-18 Luminance Record Process
39 34
CCD
YNR Y/C
LPF
COMB
NL DETAIL
EMPH ENH
70
IC301 LA71207M
3 MHz
LPF
AMP
CLAMP
REC
CURRENT
AMP
21
22
73
SP H'D
66 SLP H'D