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UD-300
38
CIRCUIT DESCRIPTION
~
2
i)
Qo
"
x
>
2a)
[23]
PLL IC: LC7218
PD2
OUTS HCTR LCTR
IN] PD1
a | FMIN
i> | AMIN
LS |
Zz
uy
_
|
oO
(8)
[~)
os
Qo
r
N
=
(5)
a
re)
ran)
>
z
z
kb
ay
ia
x
in
=
=
2
=|
>
(e)
ie)
Oo
FM
NC
FE
svc
is:
0
]
fo)
Vv
o
if
Nod REFERENCE
PHASE
DETECTOR
yp 2"
O 22
SWALLOW
COUNTER
16
1/16.
1717,
Abit
y
AAS
PLL CE
PLL
DATA
[N
PLL
CLOCK
© 20(+5V)
PLL
DATA OUT
® 2i(GND)
Q103~105)
22
i
10 os 3
MONO
C
i 1F CONT}
<Los
NC
11 |
é
FN+B
i
+B
13%
LWw+B
144
NC
178
NC
7%
NC
84
t
z
>
°
18)
u
FM/AM/MPX
OUTS OUT4
OUT3
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