Figure 3.3 Reset Operation By A Reset_N Pin (2) - Toshiba TXZ+ Series Reference Manual
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In case of RESET_N pin input change from "Low" to "High" before "Internal initialization time" elapses, internal
reset signal is released after "Internal initialization time" elapses.
Please goes up a supply voltage into an operating voltage range before "Internal initialization time" elapses. The
CPU operates after internal reset release.
Operation Voltage range
LVD Release voltage
(V
)
LVL0
PORF Release voltage
(V
)
PORFL
POR Release voltage
(V
)
PREL
0V
RESET_N pin
LVD reset
Internal reset
PORF detection release time (
LVD detection release time (
Internal initialization time (
Figure 3.3 Reset operation by a RESET_N pin (2)
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Clock Control and Operation Mode
DVDD5 = DVDD5A = DVDD5B = AVDD5
Power on rising gradient
(V
)
PON
t
)
VPORF2
t
)
VDDT2
t
)
IINIT
TXZ+ Family
TMPM3H Group(1)
DVDD5
CPU Operation start
2022-05-10
Rev. 1.3
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