Test Circuit - Toshiba T6K04 Handbook

DC Characteristics (3)
(Test condition: If not specified, V
Item
Op-Amp Output
Voltage Offset (1)
Op-Amp Output
Voltage Offset (2)
Note 1: V = 3.0 V, V
DD
DC-DC OFF, LCD out pin No Load
V pin: V
LC1
V pin: V
LC2
V pin: V
LC3
V pin: V
LC4
V pin: V
LC5
Note 2: V = 3.0 V, V
DD
DC-DC OFF, LCD out pin No Load
V = ( (V
opoffs

Test Circuit

(1) Doubler mode
= 0 V, V
SS
Test
Symbol
Circuit
V ―
opoff
V ―
opoffs
= 0 V, 1/9 bias, 1/64 duty, V
SS
− |V − V | × 1/9 = V
DD DD EE
− |V − V | × 2/9 = V
DD DD EE
− |V − V | × 7/9 = V
DD DD EE
− |V − V | × 8/9 = V
DD DD EE
− |V − V | = V
DD DD EE
opoff
= 0 V, 1/9 bias, 1/64 duty, V
SS
− V ) − (V − V
LC1 LC2 DD
= 2.7 to 3.3 V)
DD
Test Condition Min
(Note 1) −150
(Note 2) −100
= −9.5 V, Contrast control = Max, Op-Amp ON,
EE1, 2
opoff
opoff
opoff
opoff
= −9.5 V, Contrast control = Max, Op-Amp ON,
EE1, 2
) ) + ( (V − V ) − (V
LC2 LC3 LC4
Typ. Max Unit
― 150 mV
― 100 mV
− V ) )
LC4 LC5
2001-03-13 27/30
T6K04
Applicable
Terminal
V V
LC1, LC2,
V V
LC3, LC4,
V
LC5
V V
LC1, LC2,
V V
LC3, LC4,
V
LC5