Vector Base Register; Exception Handling - Motorola CPU32 Reference Manual

1.1.3 Vector Base Register

The vector base register (VBR) contains the base address of the 1024-byte exception
vector table. The table contains 256 exception vectors. Exception vectors are the
memory addresses of routines that begin execution at the completion of exception pro-
cessing. Each routine performs operations appropriate to the corresponding excep-
tion. Because exception vectors are memory addresses, each table entry is a single
long word.
Each vector is assigned an 8-bit number. Vector numbers for some exceptions are ob-
tained from an external device; others are supplied automatically by the processor.
The processor multiplies the vector number by four to calculate vector offset, then
adds the offset to the VBR base address. The sum is the memory address of the vec-
tor.
Because the VBR stores the vector table base address, the table can be located any-
where in memory. It can also be dynamically relocated for each task executed by an
operating system. Details of exception processing are provided in SECTION 6 EX-
CEPTION PROCESSING.

1.1.4 Exception Handling

The processing of an exception occurs in four steps, with variations for different ex-
ception causes. During the first step, a temporary internal copy of the status register
is made, and the status register is set for exception processing. During the second
step, the exception vector is determined. During the third step, the current processor
context is saved. During the fourth step, a new context is obtained, and the processor
then proceeds with normal instruction execution.
Exception processing saves the most volatile portion of the current context by pushing
it on the supervisor stack. This context is organized in a format called an exception
stack frame. The stack frame always includes the status register and program counter
at the time an exception occurs. To support generic handlers, the processor also plac-
es the vector offset in the exception stack frame and marks the frame with a format
code. The return-from-exception (RTE) instruction uses the format code to determine
what information is on the stack, so that context can be properly restored.
CPU32
REFERENCE MANUAL
ONE-WORD INSTRUCTION
DBcc
DBcc DISPLACEMENT
$FFFC = –4
Figure 1-1 Loop Mode Instruction Sequence
OVERVIEW MOTOROLA
1-3