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DBcc
Operation:
Assembler
Syntax:
Attributes:
Description:
code, a data register (counter), and a displacement value. The instruction first tests
the condition (for termination); if it is true, no operation is performed. If the termination
condition is not true, the low-order 16 bits of the counter data register are decre-
mented by one. If the result is –1, execution continues with the next instruction. If the
result is not equal to –1, execution continues at the location indicated by the current
value of the PC, plus the sign-extended 16-bit displacement. The value in the PC is
the address of the instruction word of the DBcc instruction plus two. The displace-
ment is a twos complement integer that represents the relative distance in bytes from
the current PC to the destination PC.
Condition code cc specifies one of the following conditions:
cc
Name
CC
Carry Clear
CS
Carry Set
EQ
Equal
F
Never equal
GE
Greater or Equal
GT
Greater Than
HI
High
LE
Less or Equal
Condition Codes:
Not affected.
MOTOROLA
4-64
Test Condition, Decrement, and Branch
If condition false then Dn – 1 → Dn;If Dn ≠ –1 then PC + d → PC
DBcc Dn, 〈label〉
Size = (Word)
Controls a loop of instructions. The parameters are a condition
Code
Description
0100
C
0101
C
0111
Z
0001
0
N • V; N • V
1100
1110 N • V • Z; N • V • Z
C • Z
0010
Z; N • V; N • V
1111
INSTRUCTION SET
cc
Name
Code
LS
Low or Same
0011
LT
Less Than
1101
MI
Minus
1011
N
Not Equal
0110
E
PL
Plus
1010
T
Always true
0000
V
Overflow Clear
1000
C
VS
Overflow Set
1001
DBcc
Description
C; Z
N • V; N • V
N
Z
N
1
V
V
CPU32
REFERENCE MANUAL
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