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14.1.3
Pin Configuration
Table 14-1 lists the pins used by the PWM D/A module.
Table 14-1 Input and Output Pins
Name
PWM output pin 0
PWM output pin 1
PWM output pin 2
PWM output pin 3
14.1.4
Register Configuration
Table 14-2 lists the registers of the PWM D/A module.
Table 14-2 Register Configuration
Channel
Name
0
PWM D/A control register 0
PWM D/A data register AH0
PWM D/A data register AL0
PWM D/A data register BH0
PWM D/A data register BL0
PWM D/A counter H0
PWM D/A counter L0
1
PWM D/A control register 1
PWM D/A data register AH1
PWM D/A data register AL1
PWM D/A data register BH1
PWM D/A data register BL1
PWM D/A counter H1
PWM D/A counter L1
All
Module stop control register B
Notes: 1. Lower 16 bits of the address.
2. The same addresses are shared by DADRA and DACR, and by DADRB and DACNT.
Switching is performed by the REGS bit in DACNT or DADRB.
Abbr.
I/O
PWM0
Output
PWM1
Output
PWM2
Output
PWM3
Output
Function
PWM output, channel 0A
PWM output, channel 0B
PWM output, channel 1A
PWM output, channel 1B
Abbreviation
R/W
DACR0
R/W
DADRAH0
R/W
DADRAL0
R/W
DADRBH0
R/W
DADRBL0
R/W
DACNTH0
R/W
DACNTL0
R/W
DACR1
R/W
DADRAH1
R/W
DADRAL1
R/W
DADRBH1
R/W
DADRBL1
R/W
DACNTH1
R/W
DACNTL1
R/W
MSTPCRB
R/W
Initial value Address*
H'30
H'FDB8*
H'FF
H'FDB8*
H'FF
H'FDB9*
H'FF
H'FDBA*
H'FF
H'FDBB*
H'00
H'FDBA*
H'03
H'FDBB*
H'30
H'FDBC*
H'FF
H'FDBC*
H'FF
H'FDBD*
H'FF
H'FDBE*
H'FF
H'FDBF*
H'00
H'FDBE*
H'03
H'FDBF*
H'FF
H'FDE9
1
2
2
2
2
2
2
2
2
2
2
2
2
2
2
549
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