Hitachi SH7750 Programming Manual page 386

High-performance risc engine superh (sh) 32-bit risc mcu/mpu series
Hide thumbs Also See for SH7750:
Table of Contents

Advertisement

STCMRm_BANK(int n)
{
R[n]–=4;
Write_Long(R[n],Rm_BANK);
PC+=2;
}
Possible Exceptions:
• General illegal instruction exception
• Slot illegal instruction exception
• Data TLB miss exception
• Data TLB protection violation exception
• Address error
Rev. 2.0, 03/99, page 372 of 396
/* STC.L Rm_BANK,@-Rn : Privileged */
/* m=0–7 */

Advertisement

Table of Contents
loading

Table of Contents