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number of bytes in an I
that for this purpose, the slave device address byte does not count as part of the data.
In a transmit session, only the transmit path is enabled and the IOSR-to-HRX FIFO transfers
are inhibited. When the HTX transfers its valid data word to the IOSR, the HTDE status bit is
set and the DSP may write a new data word to HTX with either DSP instructions or DMA
transfers. If both IOSR and HTX are empty, the SHI suspends the serial clock until new data
is written into HTX (when the SHI proceeds with the transmit session) or HIDLE is set (the
SHI reactivates the clock to generate the stop event and terminate the transmit session).
9.7.5
SHI OPERATION DURING DSP STOP
The SHI operation cannot continue when the DSP is in the stop state, because no DSP clocks
are active. While the DSP is in the stop state, the SHI remains in the individual reset state.
While in the individual reset state the following is true:
•
If the SHI was operating in the I
impedance state).
•
If the SHI was operating in the SPI mode, the SHI signals are not affected.
•
The HCSR status bits and the transmit/receive paths are reset to the same state
produced by hardware reset or software reset.
•
The HCSR and HCKR control bits are not affected.
Note:
It is recommended that the SHI be disabled before entering the stop state.
MOTOROLA
2
C frame so that they fit in a complete number of words. Remember
2
C mode, the SHI signals are disabled (high
DSP56367
Serial Host Interface
SHI Programming Considerations
9-29
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