Logic Analyzer Connector J14 Pin Assignments - Motorola M68MPB916R1 User Manual

MEVB SUPPORT INFORMATION
Table 4-7. Logic Analyzer Connector J13 Pin Assignments (continued)
Pin
15
16
17 – 19
20
Table 4-8. Logic Analyzer Connector J14 Pin Assignments
Pin
1, 2
3
4
5
6
7
8
4-8
Freescale Semiconductor, Inc.
Mnemonic
A20 / ADDRESS BUS BIT 20 – One bit of the 24-bit
address bus.
CS7 CHIP SELECT 7 – Output signal that selects
peripheral or memory devices at programmed
addresses.
A19 / ADDRESS BUS BIT 19 – One bit of the 24-bit
address bus.
CS6 CHIP SELECT 6 – Output signal that selects
peripheral or memory devices at programmed
addresses.
A18 – A16 ADDRESS BUS BITS 18 – 16 – Three bits of the 24-
bit address bus.
GND GROUND
Mnemonic
SPARE No connection
DSACK0 DATA AND SIZE ACKNOWLEDGE 0 – Active-low
input signal that allows asynchronous data transfers
and dynamic bus sizing between the MCU and
external devices.
FASTREF FASTREF – General purpose input/output lines.
TSC THREE STATE CONTROL – When TSC is logic high,
this input signal forces all output drivers to a high-
impedance state.
RESET RESET – Active-low, bi-directional signal to start a
system reset.
PE3 PORT E BIT 3 – Data input/output signal for port E.
SPARE No connection
For More Information On This Product,
Go to: www.freescale.com
Signal
Signal
M68MPB16R1UM/D