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The amplitude of input signal for 10bit ADC is 0.7Vp-p as 140IRE. in case of C signal for S-video.
The amplitude of input signal for C ADC is 0.2Vp-p as 40IRE. (Refer to Fig-2.)
The amplitude of input signal for Cb/Cr is 0.7Vp-p as 100% level. (Refer to Fig-3.) (VDD = 2.5V)
Input signal vs output signal level
Input signal
CVBS
Ｙ
C
Cb
Cr
※ Input signal amplitude： For CVBS and Y, it means 100% level (140IRE).
Notice: Ｔｈｅｓｅ amplitude of output signal have done by initial value of IIC registers related with gain.
3. Clamping
The clam control circuit controls the corect clamping for input signals.
TC90101FG has a feed back clamp for H-Sync portion of CVBS/Y input signal to clamp 256LSB(10bit unit).
It is selectable to use the 2 types of the feed back clamp (internal circuit or external circuit) via
IIC bus. (FBCLMPEX at sub address 03 hex.)
In case use external, the clamp signal from YCLAMP1,YCLAMP2(pin 74,75) to be connected with input
Terminals. (refer to application circuit.)
For C signal, it is biased to 128 LSB. For Cb and Cr signal, it is used keed clamping control to 128 LSB.
Input mode
Input signal
CVBS
S- Video/
YCbCr
CVBS+
YCbCr
(1H)
4. TV system detection for CVBS and S- Video input
TC90101FG has 4 types of detection mode and it is selectable via AUTDET at sub address 00hex.
AUTODET
00
01
10
11
There is not priority for 50Hz/60Hz(Vertical frequency) detection.
VD output (pin 70) is controled via VD.DET at sub address 23hex.
[00] : free run.
[01] : fixed mode when it detects no signal (The frequency of VDOUT is depends on TVM2.)
[10] : Fixed Frequency at Manual setting mode.
[11] : VDOUT is depends on TVM2 at all of TV system detection mode.
Feb./2005
Input signal amplitude：
Vp-p（※）
0.7Vp-p（500mVp-p）
0.7Vp-p（500mVp-p）
0.2Vp-p（Burst）
0.7Vp-p (100% color)
0.7Vp-p (100% color)
(500mVp-p: pedestal to white 100%.)
Cb/Cr, it means 100% color bar Signal.
Pin
number
CVBS
81
Y
78
C
86
Cb/Cr
88/94
CVBS
81
Y
78
Cb/Cr
88/94
8bit(ＭＰＸ)
Mode
Fsc detection
Manual setting
-
4.4336MHz
EU
3.57954MHz
3.57954MHz
3.5756MHz
South America
3.5820MHz
4.4336MHz
3.57954MHz
Full multi
3.5756MHz
3.5820MHz
Ouput signal level（LSB）
16-235(pedestal to white 100%) （8bit mode）
16-235(pedestal to white 100%) （8bit mode）
16-240（8bit mode）
16-240（8bit mode）
16-240（8bit mode）
ADC
Clamping function
10bit
Feed back clamp
10bit
8bit
−
8bit
Keed clamp
8bit
Sync chip clamp
10bit
Feed back clamp
Keed clamp
TV system is set via TV0 – TV3 at sub address 00hex.
Priority : 4.43MHz PAL→ NTSC→ SECAM
(it's not available to detect 3.58MHz PAL signal.)
Priority : 3.58MHz PAL→ 3.58MHz NTSC
(it's not available to detect 4.43MHz fsc signal.)
Priority : PAL→ NTSC→ SECAM
TC90101FG
Comment
Time constant is selectable for
internalClamping mode via BUS
FBCLMOD atSub address 32hex.
Biased to 128LSB
Commemt
7
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