Panasonic FZ-1 Service Manual page 25

FZ-1
Continued (IC140) Continued (IC140)
Pin 1/0
Pin Name Comment
Pin 1/0 Pin Name Comment
No. No.
85 1/0, TTL 010 Main system data bus 2 1 u 120 In, TTL A4 System address input
2"
86 1/0, TTL 09 Main system data bus 2
9
87 Vss
DUii-UP
121 In, TTL A3
System address input 2 3
pull-up
88 UO,TTL 08
Main system data bus 2"
122 In, TTL A2 System address input
i2
89 1/0, TTL 07
Main system data bus 2
7
pull-up
123 In, TTL, SERL
Serial audio data left select
90 UO,TTL 06 Main system data bus
'J!l
pull-up
91 Vss
124 In, TTL, SERR Serial audio data right select
92 1/0, TTL
05 Main system data bus 2
5
pull-up
125 In, TTL, SERDAT Serial audio data input
93 1/0, TTL 04
Main system data bus
2"
pull-up
94 1/0, TTL
03 Main system data bus 2
3
126 In, TTL, SERCLK Serial audio clock input
pull-up
95
Vss 127
Vss
96 1/0, TTL
02 Main system data bus
'P
128 In.CMOS, MCLK2 MCLK2input
97 1/0, TTL
01 Main system data bus 2
1
98
Vss
PUii-UP
129 In, TTL XACLK Serial audio clock input
130 Vss
99
Vdd
100 1/0, TTL 01
Main system data bus 2
1
101 Out, TTL UNCACKR Uncle chip read Acknowledge
102 Out, TTL
UNCACKW Uncle chip Write Acknowledge
103 In, TTL,
UNCREQR Uncle chip Read Request
131 Out, TTL AUDBCK Serial audio bit clock
132 Out, TTL AUDWS Serial audio word select
133 Out, TTL AUDDAT Serial audio data output
134 In, TTL, EINT- External bus interrupt input
pull-up
pull-down
104 Vss
135 In, TTL, ERDY- Expansion bus Ready signal
pull-down
105 In, TTL, UNCREQR Uncle chip Read Request
136 Out, TTL ESEL- Expansion bus Select signal
pull-down
106 In, TTL
A15 System address input 2 15
pull-up
137 Out, TTL
ECMD-
Expansion bus Command signal
138 Out, TTL
ERST-
Expansion bus Reset signal
107 In, TTL A14
System address input 2
14
139 Out, TTL EWRT- Expansion bus Write signal
pull-up
108 In, TTL A13 System address input 2
13
140 Out, TTL WSTR- Expansion bus Strobe signal
pull-up
141
Vdd
109 In, TTL A12
System address input 2
12
142 Vss
pull-uo
110 Vss
143 1/0, TTL
ED7
Expansion bus Address/Data 2
7
111 In, TTL A11 System address input 2 11
144 1/O,TTL ED6 Expansion bus Address/Data 2
6
pull-up
145 1/O,TTL EDS Expansion bus Address/Data 2~
112 In, TTL A10 System address input 2
10
pull-up
113 In, TTL
A9 System address input 2
9
146 1/O,TTL ED4 Expansion bus Address/Data
i4
147 1/0, TTL ED3 Expansion bus Address/Data 2 3
pull-up
114 In, TTL
AS System address input
i3
pull-up
148 1/0, TTL ED2 Expansion bus Address/Data
i2
149 1/0, TTL ED1 Expansion bus Address/Data 2 1
115 In, TTL
A7 System address input 2 7
150 1/0, TTL ED0 Expansion bus Address/Data
2?
pull-up
116 In, TTL A6
System address input
'1:'
pull-up
151
Vss
152 In.CMOS PON Power on reset input
117 Vss
153 ln,CMOS WDIN Watch Dog Timer C/R input
118
Vdd
154 In, TTL, HSYNC- Video Hsync input
119 In, TTL AS System address input 2 5
PUii-up
pull-up
155 In, TTL, VSYNC-
Video Vsync input
PUii-UP
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