Details Of The Buffer Memory - Mitsubishi Electric MELSECQ Series User Manual

Multichannel high-speed counter module
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3
SPECIFICATIONS
3.4.2
Figure 3.1 Timing chart for the ring counter lower limit value (Un\G0 and 1) and ring counter upper limit value (Un\G2 and 3)
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Details of the buffer memory

This section describes details of the QD63P6 buffer memory.
Each item contains the I/O numbers (X/Y) and buffer memory addresses of channel 1 only.
For buffer memory addresses of channel 2 or later and I/O numbers (X/Y) of channel 2 or
later, refer to Section 3.4.1 and Section 3.3.1, respectively.
(1) Ring counter lower limit value (Un\G0 and 1)
Ring counter upper limit value (Un\G2 and 3)
• This area is used for setting count range when the counter format is the ring
counter. (Refer to Section 5.2.2.)
• Setting value when the count enable command (Y04) changes from OFF to ON
becomes effective.
• Setting range is from -2147483648 to 2147483647 (32-bit signed binary).
Count enable command
(Y04)
Ring counter lower limit value
(Un\G0 and 1)
Ring counter upper limit value
(Un\G2 and 3)
(2) Preset value setting (Un\G4 and 5)
• This area is used for setting the preset value for the counter. (Refer to Section
5.4.)
• Setting value when the preset command (Y02) changes from OFF to ON
becomes effective.
• Setting range is from -2147483648 to 2147483647 (32-bit signed binary).
Preset value setting
(Un\G4 and 5)
Preset command
(Y02)
Present value
(Un\G10 and 11)
Figure 3.2 Timing chart for the preset value setting (Un\G4 and 5)
• For details of the general operation, refer to Section 5.4.
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ON
*1
0
-100
*1
0
100
*1: Value when the count enable command (Y04) changes from OFF
to ON becomes effective.
*2: Does not become effective until the count enable command (Y04)
changes from OFF to ON.
Performed by the QD63P6.
100
ON
OFF
t*
0
100
3.4 Buffer Memory Assignment
3.4.2 Details of the buffer memory
-200
*2
200
*2
* t
2ms
1
2
3
4
5
6
7
8
3
- 11

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