Yamaha YSP-900 Service Manual page 59

A B C
INPUT 1/2
1
L 5.4 5.8 5.8
5.8 1
5.8
5.8
5
0
2
6.4
0
VCR 6.4
4
8.3
8.4 INPUT
R
SELECTOR
AUDIO
5.8 5.8
INPUT
5.4 12
5.4
5.8 5.8
14
L 6.4 0
15
6.4 0
2 8.4
8.4
TV/STB
R
SUBWOOFER
OUT
0
3
VIDEO
OUT
14 5.0
2.6
3.2 5 6 0
DVD
9 8
COAXIAL
7 0
DIGITAL
INPUT
4.4
4
0
TV/STB
5.0
OPTICAL
4.4
0
AUX
5.0
4.4 0 5.0
13 12 1 2
5.0
4.4 0
11 10 3 4
(Writing port)
5
SYSTEM
CONNECTOR
( J model)
6
7
-22.6
-16.2
-16.2
-20.9
-22.6
-22.6
-17.8
-17.8
-19.4
-16.2
FL DRIVER
-19.4
-17.8
8
9
IC1: TC74HCU04AFEL IC2, 801: NJM2068MD-TE2
Hex inverters Dual operational amplifier
1A 1 14 VCC
1
OUT 1 8 +V CC
1Y 2 6A
13
–IN 2 7 OUT
1 2
+ – + –
2A 3 12 6Y
+IN 1 3 6 –IN 2
2Y 4 11 5A
–V 4 5 +IN
CC 2
3A 5 10 5Y
3Y 6 9 4A
GND 7 8 4Y
10
D E F
5.8
5.8
3 5.8
0
0
0
5.8
5.8
13 5.8
0
AMP
11.7
11.7 6
7 0 8 11.1
5.6
5
2
5.6
1 0
0
4 3
0
3.3 4.9
4.9
4.9
5.0
3.2 4.9
4.9
14
0
0 0
0
4.9 4.9
0 11
1.8 0
2.5
0
1.7
0
4.9
0
0 OSD
0
0
0 A-1 0
4.9 0
6
2.8
1.8
0
5.0 6.9
6.9
5.0
INPUT(2)
FL DISPLAY
-22.4
-22.6
-16.1
-16.1
-16.2
-16.2
-16.2
-14.6
3.4
1.6
0 1.6
3.2
3.2
3.2
3.2
INPUT(3)
IC5: µPC4570G2
IC4: TC4052BF
Analog multiplexers/demultiplexers Dual operational amplifier
VDD
16
OUT 1
1
13 X-COMMON
–IN 2
1
12 + – + –
I/O c O/I 0X
+IN 1 3
I/O c O/I 14 1X
A 10
15 2X
I/O c O/I –V 4
CC
11
I/O c O/I 3X
9
B
I/O c O/I 1 0Y
5 1Y
I/O c O/I
6
INH
I/O c O/I 2 2Y
I/O c O/I 4 3Y
3 Y-COMMON
8 7
VSS VEE
G H
0
0 13
0 14
7
0 1
0
Page 60 J4
3
0 2
to INPUT(1)_CB505
0 4
5
0
0 9
0
8
0
10
8 11.1
5.1
5.1
5 5.1
7 5.1
1.4
6
5.1
Page 57 J4
to DSP_CB8
FRONT SW
IR-IN
IC9: M62782GP
Voltage threshold detector
SUPPLY VOLTAGE
4
R1
OSC
-
R2 + COUNTER
1.25V
3 2 1
N.C. SUB GND
(GND)
IC6: MAX3232CDWR
3V to 5.5V multichannel
IC7: TC74HCT08AF IC10: NJM78M05FA
RS-232 line driver/receiver Quad 2-input AND gate Voltage regulator
8 +V
CC
1A 1 14 Vcc
OUT
7 2 C1+ 1 16 VCC
1B 2 13 4B
V+ 2 15 GND 1Y 3 12 4A
6 –IN 2
2A 4 11 4Y
C1 3 14 DOUT1
5 +IN
2
2B 5 10 3B
C2+ 4 13 RIN1
2Y 6 9 3A
5 12
C2 ROUT1 GND 7 8 3Y
6 11
V DIN1
DOUT2 7 10 DIN2
8 9
RIN2 ROUT2
I J K
POINT A-1 pin 6 of IC8
4.8
1.4
3
1 6.6
4 0 2
INPUT(5)
IC8: MB90050PF
On-screen display controller
SIN
Serial input
Each block
SCLK
control
CS
VIN
YIN
CIN
HSYNCI
VSYNCI
Sync control
Video signal
FLDI generator circuit
SYNCST
INPUT(4) HSYNCO
VSYNCO
NTSC/PAL
CSYNCO signal
generator
Pallete
FLDO
circuit
(4 bits→6 bits)
VBLKO
Display Memmory control
BUSY
VRAM
Font ROM
(35 characters
GND 1 5 OUTPUT
× 16 lines) (512 characters)
5 OUTPUT
2
SUB
(GND)
4 SUPPLY EXS 4FSC clock
N.C. 3
VOLTAGE
oscillation Each block
XS
circuit
FSC4O
EXD
Dot clock
oscillation Each block
XD
circuit
DCLKO
All reset
RESET
INPUT
OUTPUT
COMMON
# All voltages are measured with a 10MΩ/V DC electronic volt meter.
# Components having special characteristics are marked s and must be replaced
with parts having specifications equal to those originally installed.
# Schematic diagram is subject to change without notice.
L M N
YSP-900
IC901: M66003-0101FP
FL display driver
Display code
RAM CGROM
(35 bit x 166) 44 P35
(8-bit x 60)
Segment 19 P10
Code
write output
17 P9
circuit
CGROM
Serial dot data 9 P1
/CEFL 2 data (35 bit x 16)
write
receive
CKFL 3 Code/
4 circuit
DTFL command
45 P36
control
circuit
G12
52
51 G13
code
Segment G14
select 50
digit
select/
49
XIN 7
Clock Display output
timing
generator circuit
clock controller scan pulse
XOUT 6 48
47 P38
46 P37
63 G1
Digit
/RESET 1 output
circuit
VDD
8 G11
53
Vcc2 18
Vss 5
Vp 64
VOUT
Analog
YOUT
switch
COUT
FLDI 1 36 PO3
VSYNCI 2 35 PO2
HSYNCI 3 34 DCOL5
VCC 4 33 DCOL4
VSS 5 32 DCOL3
MB90050
EXS 6 31 DCOL2
DCOL5 to DCOL0
Output control
DB XS 7 30 DCOL1
DH
FSC4O 8 29 DCOL0
VSYNCO 9 28 DCLKO
HSYNCO 10 27 DB
CSYNCO 11 26 DH
VBLKO 12 25 RESET
Font RAM
(8 characters)
PO3
PO2
Port control
PO1
PO0
59