Yamaha YSP-900 Service Manual page 57

A B C
DSP 3/3
1
2
3
0
4
3.3
3.2
3.1
2.6
3.3
3.2
1.7
1.7
0.7
0
0
0
1.7
0.9
1.7
1.7
2.5
5
6
0
3.3
7 3.2
3.1
2.6
3.3
3.2
1.7
1.7
0.7
0
0
0
0
0.9
1.7
1.7
2.5
8
9
10
# All voltages are measured with a 10MΩ/V DC electronic volt meter.
# Components having special characteristics are marked s and must be replaced
with parts having specifications equal to those originally installed.
# Schematic diagram is subject to change without notice.
D E F
2.5
3.2
3.3
0
0
3.2
3.2
0
3.3 0
1.7 0
0
1.7
0
0
1.6
3.0
0.7 3.2
1.5 3.2
1.5 3.4
1.5 0
1.5 0
1.5
1.5 3.2
0
0 0.4
0
0
0
3.3 0
EEPROM
2.5
3.3
1.7
1.7
1.5
1.5
1.5
1.5
1.5
0
3.3
1.7
0
0
1.7 0
3.2
1.7
0
0 3.3
3.3 4.8
0
0 2.4
5.0 2.4
DAC
SW
G H I
3.3 3.3
0
2
B-1
0
1
3.2
3.2
3.3
A-3
0.1
0
3.3
3.3
3.3
0
3.3
3.3
3.0
MICROPROCESSOR
0
0
0
0
0
0
0
3.2
3.2
1.7
1.6
0
1.7 0
1.7 3.2
0
0 3.3
3.3 4.1
2.0 0
0 2.1
5.0 2.1
J K L
IC18, 19: YSS930-SZ
DSP
MICROPROCESSOR
INTERFACE
PROGRAM COEFFICIENT
RAM
CONTROL REGISTER 50 bit ＊1024 word 16 bit ＊1024 word
CONTROL
SIGNALS
SDBCK
SDWCK
SDI0
SDI1
SDI2
SDI3
32 bit DSP Core
SDI4
SDI5
SDI6
SDI7
DSP INTERNAL
OPERATING CLOCK
CK (30.72~40.96MHz)
EXTERNAL RAM
INTERFACE
PLL
IC20, 22: WM8728
24bit, 192kHz stereo DAC
MODE LATI2S SCKDSD
16 20 19
BCKIN 3
LRCIN 1
DIN 2
4
MCLK
IC21: S-29630AFJA
CMOS serial EEPROM
Memory array
Data register
DI
Mode decode logic
CS
SK Clock generator
IC24: M30626FHPFP
Single-chip 16-bit cmos microcomputer
8 8 8 8
Port P0 Port P1 Port P2 Port P3
<VCC2 ports> (4)
Internal peripheral functions
A/D converter
(10 bits 8 channels
X
Timer (16-bit)
Expandable up to 26 channels)
Output (timer A): 5
UART or
Input (timer B): 6
clock synchronous serial I/O
DSP (8 bits X 3 channels)
Three-phase motor
control circuit CRC arithmetic circuit (CCITT )
(Polynomial : X
M16C/60 series16-bit CPU core
R0H R0L
Watchdog timer
R1H R1L
POINT A-3 pin 13 of IC24
(15 bits)
R2
R3
DMAC
A0
(2 channels)
A1
FB
D/A converter
(8 bits X 2 channels)
<VCC1 ports> (4)
<VCC2 ports>
Port P11 Port P14 Port P12 Port P13
(3) (3) (3)
8 2 8
NOTES :
1. ROM size depends on microcomputer type.
2. RAM size depends on microcomputer type.
3. Ports P11 to P14 exist only in 128-pin version.
4. Use M16C/62PT on VCC1= VCC2.
M N
YSP-900
ADDRESS
RAM RAM
17 bit ＊256 word
SDO0
SDO1
SDO2
SDO3
SDO4
SDO5
SDO6
SDO7
SDIDEM MUTEB CSBIWL ZERO
18 17 15 5
VOUTR
8
11 VOUTL
12 VMID
10 7 14 13 9 6
AVDD DVDD VREFP VREFN AGND DGND
CS 1 8 VCC
VCC
Address
SK 2 7 NC
decoder
GND
DI 3 6 TEST
DO 4 5 GND
Output buffer DO
8 8 8
Port P4 Port P5 Port P6
<VCC1 ports> (4)
System clock
generation circuit
XIN-XOUT
XCIN-XCOUT
PLL frequency synthesizer
On-chip oscillator
Clock synchronous serial I/O
16 +X 12 +X 5 +1)
(8 bits X 2 channels)
Memory
SB
ROM (1)
USP
ISP
(2)
RAM
INTB
PC
FLG
Multiplier
(4)
(3)
8
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