GE IMP2B Hardware Reference Manual page 6

List of Tables
Table 2-1 Link Functions ............................................................................................................................................................................... 10
Table 2-2 Suggested Link Settings .......................................................................................................................................................... 11
Table 2-3 Links P2 1-2 and 3-4 .................................................................................................................................................................. 11
Table 2-4 Link P2 5-6 ...................................................................................................................................................................................... 12
Table 2-5 Link P3 1-2 ...................................................................................................................................................................................... 12
Table 2-6 Links P3 3-4 and 5-6 .................................................................................................................................................................. 13
Table 2-7 Link P4 1-2 ...................................................................................................................................................................................... 13
Table 2-8 Link P4 3-4 ...................................................................................................................................................................................... 14
Table 2-9 Link P4 5-6 ...................................................................................................................................................................................... 14
Table 2-10 Link P5 1-2 ................................................................................................................................................................................... 14
Table 2-11 Link P5 3-4 ................................................................................................................................................................................... 15
Table 3-1 SDRAM Options ............................................................................................................................................................................ 18
Table 3-2 Flash Options ................................................................................................................................................................................ 19
Table 3-3 Boot Image Selection ................................................................................................................................................................ 19
Table 3-4 VxWorks Card-level Memory Map ...................................................................................................................................... 21
Table 3-5 PMC Site IDSEL Connections .................................................................................................................................................. 21
Table 3-6 Alternative PMC I/O Mode Signals ...................................................................................................................................... 23
Table 3-7 Signal Sets Per Port in Available Modes ........................................................................................................................... 24
Table 3-8 I C Device Addresses ................................................................................................................................................................. 26
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Table 3-9 EPLD Registers .............................................................................................................................................................................. 28
Table 3-10 Board ID Register 1.................................................................................................................................................................. 29
Table 3-11 Board ID Register 2.................................................................................................................................................................. 29
Table 3-12 Device/Bus Information Register 1 .................................................................................................................................. 29
Table 3-13 Device/Bus Information Register 2 .................................................................................................................................. 30
Table 3-14 Configuration Register 1 ....................................................................................................................................................... 30
Table 3-15 Configuration Register 2 ....................................................................................................................................................... 31
Table 3-16 Control Register 1 .................................................................................................................................................................... 31
Table 3-17 Control Register 2 .................................................................................................................................................................... 32
Table 3-18 Test Registers ............................................................................................................................................................................. 32
Table 3-19 Scratchpad Registers ............................................................................................................................................................. 32
Table 3-20 EPLD Interrupt Register ......................................................................................................................................................... 33
Table 3-21 Software Reset Register ........................................................................................................................................................ 33
Table 3-22 Semaphore Register ............................................................................................................................................................... 34
Table 3-23 GPIO Line to Register Bit Mapping ................................................................................................................................... 35
Table 3-24 Reset Causes .............................................................................................................................................................................. 37
Table 3-25 Interrupt Mapping .................................................................................................................................................................... 38
Table 3-26 Interrupt Combination ........................................................................................................................................................... 38
Table 3-27 JTAG Chains ................................................................................................................................................................................ 39
Table 3-28 LEDs ................................................................................................................................................................................................ 40
Table 3-29 BIT Status LEDs .......................................................................................................................................................................... 41
Table 4-1 Connector Functionality .......................................................................................................................................................... 42
6 IMP2B 3U cPCI Single Board Computer Publication No. IMP2B-0HH/5