GE IMP2B Hardware Reference Manual page 5

3 • Functional Description (continued)
3.15 EPLD ........................................................................................................................................................................................................ 28
3.15.1 Internal EPLD Registers ............................................................................................................................................................................. 28
3.15.2 Board ID Register 1 - Offset 0x00000000 ........................................................................................................................................ 29
3.15.3 Board ID Register 2 - Offset 0x00000002 ........................................................................................................................................ 29
3.15.4 Device/Bus Information Register 1 - Offset 0x00000004 ......................................................................................................... 29
3.15.5 Device/Bus Information Register 2 - Offset 0x00000006 ......................................................................................................... 30
3.15.6 Configuration Register 1 - Offset 0x00000008 .............................................................................................................................. 30
3.15.7 Configuration Register 2 - Offset 0x0000000A.............................................................................................................................. 31
3.15.8 Control Register 1 - Offset 0x0000000C ........................................................................................................................................... 31
3.15.9 Control Register 2 - Offset 0x0000000E ........................................................................................................................................... 32
3.15.10 Test Registers .............................................................................................................................................................................................. 32
3.15.11 Scratchpad Registers .............................................................................................................................................................................. 32
3.15.12 EPLD Interrupt Register - Offset 0x00000020 ............................................................................................................................. 33
3.15.13 Software Reset Register - Offset 0x00000040 ............................................................................................................................ 33
3.15.14 Semaphore Register - Offset 0x00000060 ................................................................................................................................... 34
3.16 General Purpose I/O Controller ................................................................................................................................................. 34
3.16.1 GPIO Direction Control Register - Offset 0x00000400 ............................................................................................................... 35
3.16.2 GPIO Data Register - Offset 0x00000402 ......................................................................................................................................... 35
3.16.3 GPIO Polarity Control Register - Offset 0x00000404 .................................................................................................................. 35
3.16.4 GPIO Interrupt Mode Register - Offset 0x00000406 ................................................................................................................... 35
3.16.5 GPIO Interrupt Active Register - Offset 0x00000408 .................................................................................................................. 36
3.16.6 GPIO Interrupt Enable Register - Offset 0x0000040A ................................................................................................................ 36
3.16.7 GPIO Masked Interrupt Status Register - Offset 0x0000040C ................................................................................................ 36
3.17 CompactPCI Arbiter ........................................................................................................................................................................ 36
3.18 Resets .................................................................................................................................................................................................... 37
3.19 Interrupts.............................................................................................................................................................................................. 38
3.20 JTAG ........................................................................................................................................................................................................ 39
3.21 LEDs ........................................................................................................................................................................................................ 40
3.22 Front Panel .......................................................................................................................................................................................... 41
4 • Connectors ................................................................................................................................................ 42
4.1 J2 Connector Pinout .......................................................................................................................................................................... 43
4.1.1 System Controller Card (IMP2B-xxxxA) ................................................................................................................................................. 43
4.1.2 Peripheral Only Card (IMP2B-xxxxB) ...................................................................................................................................................... 44
4.1.3 Limited Host, Full PMC User I/O Card (IMP2B-xxxxD) ..................................................................................................................... 45
4.1.4 System Controller Card - Alternative PMC I/O (IMP2B-xxxxE) .................................................................................................... 46
4.1.5 J2 Connector Signal Descriptions ........................................................................................................................................................... 47
4.1.6 PMC Rear I/O Tracking.................................................................................................................................................................................. 47
4.2 JTAG Test Header (P38) .................................................................................................................................................................... 47
A • Specifications ........................................................................................................................................... 48
A.1 Technical Specification .................................................................................................................................................................... 48
A.2 Electrical Specification ..................................................................................................................................................................... 49
A.3 Weight ...................................................................................................................................................................................................... 50
A.4 Reliability (MTBF) .................................................................................................................................................................................. 50
A.5 Product Codes ...................................................................................................................................................................................... 51
A.6 Software Support ................................................................................................................................................................................ 51
A.7 Development Tools ............................................................................................................................................................................ 52
A.8 I/O Modules ........................................................................................................................................................................................... 52
Index .................................................................................................................................................................... 53
Publication No. IMP2B-0HH/5 Contents 5