Mitsubishi Electric MELSEC Q Series Handbook page 37

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2
REPLACEMENT OF CPU MODULE
AnS/QnAS series model
Product
Model
CPU module
Q2ASHCPU-S1
*1
The CPU module with the communications function can be replaced with the CPU module and the communication module
as listed in the following table.
Model
A1SCPUC24-R2
*2
The instruction for file registers and special function modules need to be replaced with those for the Q series.
*3
The High-speed Universal model QCPU (QnUDVCPU) supports an SD memory card.
*4
For a bus connection with the Q00UJCPU, the number of extension stages must be 2 stages or less (including GOT).
For a bus connection with the Q00UCPU, Q01UCPU and Q02UCPU, the number of extension stages must be 4 stages or
less (including GOT).
Model
1) I/O control: Refresh only
2) Processing speed (LD instruction) : 0.075µs  0.0019μs (Q04UDVCPU)
3) PC MIX value: 3.8 227 (Q04UDVCPU)/60 (Q04UD(E)HCPU)
4) Number of I/O points: 1024 points 4096 points
5) Number of I/O device points: 8192 points 8192 points
6) Program capacity: 60k steps 40k steps
7) Number of file register points: 0k points (Memory card (sold separately) is necessary.)
Q04UDVCPU/
Q04UD(E)HCPU
8) Number of extension stages: 1 stages 7 stages
9) Applicable memory: program memory/memory card (sold separately)
 program memory/Standard RAM/Standard ROM/memory card
10) Microcomputer program: not available
1) I/O control: Refresh only
2) Processing speed (LD instruction) : 0.075µs  0.0019μs (Q06UDVCPU)
3) PC MIX value: 3.8 227 (Q06UDVCPU)/60 (Q06UD(E)HCPU)
4) Number of I/O points: 1024 points 4096 points
5) Number of I/O device points: 8192 points 8192 points
6) Program capacity: 60k steps
7) Number of file register points: 0k points (Memory card (sold separately) is necessary.)
Q06UDVCPU/
Q06UD(E)HCPU
8) Number of extension stages: 1 stages 7 stages
9) Applicable memory: program memory/memory card (sold separately)
 program memory/Standard RAM/Standard ROM/memory card
10) Microcomputer program: not available
Alternative models
Communication
CPU module model
module model
QJ71C24N/
Q00UCPU
QJ71C24N-R2
Q series alternative model
Remarks (restrictions)
0.075µs 0.0095µs (Q04UD(E)HCPU)
128k points
(Using extended SRAM cassette (Q04UDVCPU):
Max.4224k points)
(Using memory card (Q04UD(E)HCPU):
Max.4086k points)
0.075µs 0.0095µs (Q06UD(E)HCPU)
384k points
(Using extended SRAM cassette (Q06UDVCPU):
Max.4480k points)
(Using memory card (Q06UD(E)HCPU):
Max.4086k points)
Precaution
Mounting the A/QnA series CPU module with the communications function
on a base unit  Mounting a communication module on a base unit (1 slot
is required and 32 points are occupied.)
*3
(sold separately)
*3
(sold separately)
2
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