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When this connector is used with an external Host Target Interface, the parallel JTAG
interface should be disabled by placing a jumper in jumper block JG2. Reference
Table 2-4
for this jumper's selection options.
Table 2-4. Parallel JTAG Interface Disable Jumper Selection
2.7.2 Parallel JTAG Interface Connector
The Parallel JTAG Interface Connector, P2, allows the DSP56F803 to communicate with
a Parallel Printer Port on a Windows PC; see
can download programs and work with the DSP56F803's registers.
pin-out for this connector. When using the parallel JTAG interface, the jumper at JG2
should be removed; refer to
Host Target Interface to be powered by the Target board instead of the Host system, as
shown in
Table
2-6.
DB-25
PORT_TDO
PORT_TRST
PORT_TMS
PORT_TCK
PORT_RESET
Figure 2-5. Block Diagram of the Parallel JTAG Interface
2-8
Table 2-3. JTAG Connector Description
Pin #
Signal
11
+3.3V
13
NC
JG2
No jumper
On-board Parallel JTAG Interface Enabled
1–2
Disable on-board Parallel JTAG Interface
Table
2-4. A jumper, JG8, is provided to allow the on-board
PARALLEL JTAG
INTERFACE LOGIC
PORT_TDI
DSP56F803EVM Hardware User's Manual
J1
Pin #
Signal
12
NC
14
TRST
Comment
Figure
2-5. By using this connector, the user
DSP56F803
TDI
TDO
TRST
TMS
TCK
RESET
Table 2-5
shows the
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