External Interrupts; Sh7760 External Interrupts - Hitachi SH7760 Solution Engine2 Overview

7. Eeternal Interrupt

7.1 SH7760 External Interrupts

Figure 7.1 shows a mechanism for the SH7760 interrupt signal.
Table 7.1 shows the levels for respective interrupt signals.
As shown in Figure 7.1, interrupt signals from devices within Solution Engine2 are converted into the /IRL signals
by FPG, then output to the /IRL [3:0] of the SH7760.
SH7760
/IRL3
/IRL2
/IRL1
/IRL0
No Interrupt request source
1 PCMCIA controller (SIRQ3)
2 PCMCIA controller (SIRQ2)
3 PCMCIA controller (SIRQ1)
4 PCMCIA controller (SIRQ0)
5 UART controller chA
6 UART controller chB
7 H8/3048F-ONE
8 Extension slot (IRQ3#)
9 Extension slot (IRQ2#)
10 Extension slot (IRQ1#)
11 Extension slot (IRQ0#)
FPGA
IRQ -> IRL
conversion
Figure 7.1 InterruptSignal Mechanism
Table 7.1 Interrupt Levels for Interrpt Signals
Interrupt input pin
/IRL[3:0]
/IRL[3:0]
/IRL[3:0]
/IRL[3:0]
/IRL[3:0]
/IRL[3:0]
/IRL[3:0]
/IRL[3:0]
/IRL[3:0]
/IRL[3:0]
/IRL[3:0]
110
UART
(ST16C2550)
INTA TXA ,RXA
INTB TXB ,RXB
Interrupt signal level
/IRL[3:0]=0001
/IRL[3:0]=0101
/IRL[3:0]=1000
/IRL[3:0]=1010
/IRL[3:0]=0110
/IRL[3:0]=0011
/IRL[3:0]=0010
/IRL[3:0]=0000
/IRL[3:0]=0100
/IRL[3:0]=0111
/IRL[3:0]=1001
PCMCIA controller
MR-SHPC-01 V2T
/SIRQ3
/SIRQ2
/SIRQ1
/SIRQ0
Extension slot
local bus
IRQ3#
IRQ2#
IRQ1#
IRQ0#
Power supply controller
H8/3048F-ONE
/H8_IRQ(PB3)
TxD ,RxD
CN1
Host
Remarks
Interrupt level 14
Interrupt level 10
Interrupt level 7
Interrupt level 5
Interrupt level 9
Interrupt level 12
Interrupt level 13
Interrupt level 15
Interrupt level 11
Interrupt level 8
Interrupt level 6