Parallel Port - Sony 486DX User Manual

(8) MODEM Status Register (MSR)
Bit 0: Delta Clear to Send (DCTS)
Bit 1: Delta Data Set Ready (DDSR)
Bit 2: Training Edge Ring Indicator (TERI)
Bit 3: Delta Receive Line Signal Detect (DSLSD)
Bit 4: Clear to Send (CTS)
Bit 5: Data Set Ready (DSR)
Bit 6: Ring Indicator (RI)
Bit 7: Received Line Signal Detect (RSLD)
(9) Divisor Latch (LS, MS)
Bit 0:
Bit 1:
Bit 2:
Bit 3:
Bit 4:
Bit 5:
Bit 6:
Bit 7:
Table 2-8 Serial Port Divisor Latch

2.5 PARALLEL PORT

(1) Register Address
Table 2-9 Registers' Address
(2) Printer Interface Logic
The parallel portion of the SMC37C669 makes the attachment of various devices that accept eight bits of parallel
data at standard TTL level.
LS MS
Bit 0 Bit 8
Bit 1 Bit 9
Bit 2 Bit 10
Bit 3 Bit 11
Bit 4 Bit 12
Bit 5 Bit 13
Bit 6 Bit 14
Bit 7 Bit 15
Desired Baud Rate
300
600
1200
1800
2400
3600
4800
9600
14400
19200
28800
38400
57600
115200
Port Address
base + 0
base + 0
base + 1
base + 2
Divisor Used to Generate 16x Clock
384
192
96
64
48
32
24
12
8
6
4
3
2
1
Read/Write
Write Output data
Read Input data
Read Printer status buffer
Write Printer control latch
AR-B1474 User¡ ¦ s Guide
Register
2-9