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15-8. Seven bit words representing one of 128 possible characters are stored in RAM for each character
location on the CRT. The character generator sequentially accesses each RAM location in synchronization
with the raster scan and creates a pulse modulation sequence in response to the character data that results in
the character being displayed on the CRT. When the processor is not accessing RAM, the Address/Data Buffer
from the processor is disabled and the Address Buffer from the character generator is enabled. The CHAR
ADRS signal from the Character Clock Generator addresses the RAM location corresponding to the location
being currently scanned on the CRT. The seven bits of data representing the character to be displayed are
latched by the CHAR LATCH signal. A Character ROM decodes the seven bits plus a three bit ROW ADRS to
determine the dot pattern for the current dot row scan position for the character to be displayed. The dot
pattern is then parallel loaded into a Shift Register and clocked out serially to give the CHAR GEN Z-AXIS
pulse modulation sequence. It should be noted that each character line on the CRT is scanned eight times,
once for each dot row. Thus each character must be accessed eight times from RAM before the total character
is displayed.
15-9. To maintain synchronization between the CHAR GEN Z-AXIS signal and the raster scan, the Clock
Generator outputs horizontal and vertical character sync signals. These sync signals coordinated the sweep
generators on the Scope/DVM Control module with the character generator. For the dual display mode,
explained in paragraph 9-6, a LINE 1 output and a CHAR GEN RST input is provided to the clock generator.
15-2
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