Ac Characteristics - Hitachi HD64411 Q2 User Manual

I t e m I n p u t Ou tput
I1 CMOS —
I2 TTL —
IO1 TTL CMOS
IO2 TTL CMOS
O1 — CMOS
O2 — CMOS
7 . 4 . 2

AC Characteristics

(1) Input Clocks
Table 7-4 Input Clocks (1) (Pins MODE2 to MODE0 = 011: Multiplication
Off)
I t e m Symbol Min
Clock 0 Cycle Time t
Clock 0 "High" Level t
Pulse Width
Clock 0 "Low" Level t
Pulse Width
Clock 0 Duty t
Clock 1 Cycle Time t
Clock 1 "High" Level t
Pulse Width
Clock 1 "Low" Level t
Pulse Width
Clock 1 Duty t
Clock Rise Time t
Clock Fall Time t
178
High-Z Pull-up
— —
— —
Yes —
Yes —
— —
— —
30.3
cyc0
10.1
C0PWH
10.1
C0PWL
0.5t – 1.7
C0DT cyc0
60.6
cyc1
25.3
C1PWH
25.3
C1PWL
0.5t – 1.7
C1DT cyc0
—
cr
—
cf
Pin Names
CLK1, CLK0
MODE2–0, RESET, A22–A1, CS1–0, RD,
WE1–0, DACK
HSYNC/EXHSYNC, VSYNC/EXVSYNC,
ODDF, MD15–0
D15–D0
CDE, DD17–0, DCLK, FCLK, DISP, MA11–
0, MWE, MRAS1–0, MLCAS, MUCAS,
MOE, CSYNC
DREQ, IRL, WAIT
T e s t
M a x Unit Conditions N o t e s
50 ns Figure 7-3
— ns
— ns
0.5t + 1.7 ns
cyc0
150 ns
170
— ns
— ns
0.5t + 1.7 ns
cyc0
5 ns
5 ns
XW ≥ 512
XW < 512