Yamaha MCX-1000 Service Manual page 65

A B
SCHEMATIC DIAGRAM (MAIN: DMAC Block)
1
2
3
4
SDRAM
5
6
IC221: W986416DH-7
SDRAM
CLK
CLOCK
BUFFER
CKE
7
CS CONTROL
SIGNAL
GENERATOR
RAS
COMMAND
DECODER
CAS
WE
A10
MODE
A0 REGISTER
ADDRESS
A9 BUFFER
A11
BS0
BS1
REFRESH COLUMN
8
COUNTER COUNTER
9
C D E
IC224~227: FST3383MTC
10-Bit Low Power Bus-Exchange Switch
A0
COLUMN DECODER COLUMN DECODER
CELL ARRAY CELL ARRAY
BANK #0 BANK #1
SENSE AMPLIFIER SENSE AMPLIFIER
B0
DMn
DQ0
DATA CONTROL DQ A4
CIRCUIT BUFFER
DQ15
UDQM
LDQM
B4
COLUMN DECODER COLUMN DECODER
CELL ARRAY CELL ARRAY
BANK #2 BANK #3
BX
SENSE AMPLIFIER SENSE AMPLIFIER
BE
F G
C0
BE 1 24 Vcc
C0 2 23 D4
A0 3 22 B4
B0 4 21 A4
D0
D0 5 20 C4
C1 6 19 D3
A1 7 18 B3
B1 8 17 A3
C4
D1 9 16 C3
C2 10 15 D2
A2 11 14 B2
12 13 BX
GND
D4
All voltages are measured with a 10MΩ/V DC electronic voltmeter.
Components having special characteristics are marked s and must be replaced
with parts having specifications equal to those originally installed.
Schematic diagram is subject to change without notice.
H I J K L
MCX-1000
65