Sony mxp-29 Operation And Maintenance Manual page 5

SN7406N
WD2793A-PL02
SN7406N
(Tl)
TTL INVERTER BUFFER/DRIVER
WITH OPEN-COLLECTOR
—
TOP VIEW
—
SN7438N
**••*•*•**
SN74LS38N
(Tl)
TTL 2-INPUT POSITIVE-NAND
GATE BUFFER
WITH OPEN-COLLECTOR
—
TOP VIEW
—
Iwl
1i3l
[5
!
f!Tl
(iol (9l f6]_
rPi
«,
ih
m
Erma
\tnr
Y—
A
•
B
=
A+
B
O',
LOW LEVEL
1 ;
HIGH LEVEL
*
;
OPEN COLLECTOR
SN7493AN
SN74LS93N
(Tl)
TTL 1-BIT
AND
3-BIT
BINARY
COUNTER
—
TOP VIEW
—
COUNT
SEQUENCE
RESET/ COUNT
FUNCTION
|
RESET
IN
|
|
OUTPUTS
|
RDl
RD2 Qd
QC QB
i
Oa
1 1
0 0 0
i
0
X
0
COUNT
0 X
COUNT
OiLOW LEVEL
1
;
HIGH
LEVEL
X; DON'T
CARE
TL43 TCP
TL431CP
(Tl)
ADJUSTABLE PRECISION
SHUNT REGULATOR
—
TOP VIEW
—
TL431CP
WD2793A-PL02 (WESTERN
DIGITAL)
N CHANNEL
E/D
MOD
FLOPPY
DISK
FORMATTER/CONTROLLER
—
TOP VIEW
—
WD2793A-PL02U/2)
ENP
WE
CS
RE
AO
A1
DALO
DALI
DAL2
DAL3
DAL4
DAL5
DAL6
DAL7
STEP
DIRC
5/8
RPW
MR
TROO
I
TRACK 00
VCO
l
VOLTAGE-CONTROLLED OSC
WD
i
WRITE DATA
WE
«
WRITE ENABLE
WG
S
WRITE GATE
WPRT
»
WRITE PROTECT
WPW
I
WRITE PRECOMP
WIDTH
WD2793A—
PL02(2/2)
DAL 0 READY
DAL
1
RAW
REAO
OAL
2
VCO
DAL
3
ENMF
DAL 4
DAL
5
OAL
e
WPW
DAL
7
WG
AO
A
1
WD
WPRT
CS
1
P
WE TROO
RE
TG43
UR 5/8
ENP RPW
DRO STEP
IRQ
DIRC
HLD
>
HLT
PUMP
DDEN
TEST
5/8
;5
1/4" 8" SELECT
AO,
I
REGISTER SELECT LINES
CL
K
.CLOCK
CS
;CHIP
SELECT
DALO-7 ;DATA ACCESS LINES
DDEN ROUBLE
DENSITY
01 RC '.DIRECTION
DRO ;DATA REQUEST
ENMF
J
ENABLE
MINI-FLOPPY
ENP
J
ENABLE PRECOMP
HLD
5
HEAD LOAD
HLT
t
HEAO LOAD
TIMING
IP
i
INDEX
PULSE
IRQ
;
INTERRUPT REQUEST
MR
;
MASTER RESET
RE
i
REAO ENABLE
RPW
»
READ PULSE WIOTH
TG43
;
TRACK GREATER THAN43
CR
i
COMMAND REGISTER
DR ;data REGISTER
DSR
;DATA SHIFT REGISTER
SCR
;SECTOR REGISTER
TR
'.TRACK
REGISTER
STR
,
STATUS REGISTER
REGISTER SELECTION
CS A
1
AO
RE
=
0
WE
= 0
1
X X NON SELECT DAL
= HI-Z
0 0 0
STR
C R
0 0
1
TR TR
0
1
0
SCR SCR
0
1
1
DR OR
0
;
LOW
LEVEL
1 ;
HIGH LEVEL
X
;
DON'T
CARE
HI-Z;HIGH IMPEDANCE