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Schweitzer Engineering Laboratories SEL-751 Manuals
Manuals and User Guides for Schweitzer Engineering Laboratories SEL-751. We have
1
Schweitzer Engineering Laboratories SEL-751 manual available for free PDF download: Instruction Manual
Schweitzer Engineering Laboratories SEL-751 Instruction Manual (934 pages)
Feeder Protection Relay
Brand:
Schweitzer Engineering Laboratories
| Category:
Relays
| Size: 23.97 MB
Table of Contents
Table of Contents
3
Overview
25
Communications Protocol
26
Settings
30
Overview
37
Table 1.2 Current (ACI) and Voltage (AVI) Card Selection for SEL-751 Models
38
Table 1.1 Phase and Neutral Current Ratings Selection for the SEL-751 Models
38
Table 1.3 SEL-751 Protection Elements
38
Table 1.4 SEL-751 Front-Panel Options
40
Models, Options, and Accessories
41
Applications
43
Figure 1.1 SEL-751 Feeder Protection Relay Applied Throughout the Power System
44
Figure 1.2 Typical Current Connections
45
Getting Started
45
Figure 1.3 Response Header
46
Table 1.5 SEL-751 Serial Port Settings
46
Figure 1.4 STA Command Response-No Communications Card or
47
Figure 1.5 STA Command Response-Communications Card/Devicenet Protocol
47
Definitions
48
Specifications
49
Overview
57
I/O Configuration
58
Figure 2.1 Relay Panel-Mount Dimensions
58
Figure 2.2 Slot Allocations for Different Cards
59
Table 2.1 Power Supply Inputs (PSIO/2 DI/3 DO) Card Terminal Designations
60
Table 2.2 Communications Ports
60
Table 2.3 Communications Card Interfaces and Connectors
62
Table 2.4 Current/Voltage Inputs (4 ACI/3 AVI) Card Terminal Designations
63
Table 2.5 Current Inputs (4 ACI) Card Terminal Designations
63
Table 2.6 Voltage/Arc-Flash Detection Inputs (2 AVI/4 AFDI) Card Terminal Designations
64
Table 2.7 Eight Arc-Flash Detection Inputs (8 AFDI) Card Terminal Designations
64
Table 2.8 Eight Analog Inputs (8 AI) Card Terminal Designations
65
Table 2.9 Four Analog Inputs/Four Analog Outputs (4 AI/4 AO) Card Terminal Designations
65
Table 2.10 I/O (3 DI/4 DO/1 AO) Card Terminal Designations
66
Table 2.11 RTD (10 RTD) Card Terminal Designations
66
Table 2.12 Four Digital Inputs, One Form B Digital Output, Two Form C Digital Outputs (4 DI/3 DO) Card Terminal Designations
67
Table 2.13 Four Digital Inputs/Four Digital Outputs (4 DI/4 DO) Card Terminal Designations
67
Table 2.14 Eight Digital Inputs (8 DI) Card Terminal Designations
68
Table 2.15 Eight Digital Outputs (8 DO) Card Terminal Designations
68
Table 2.16 Fourteen Digital Inputs (14 DI) Card Terminal Designations
69
Figure 2.3 Circuit Board of Analog I/O Board, Showing Jumper Selection
73
Figure 2.4 JMP1 through JMP4 Locations on 4 AI/4 AO Board
73
Figure 2.5 Current Output Jumpers
73
Figure 2.6 Voltage Output Jumpers
73
Table 2.17 Jumper Functions and Default Positions
74
Relay Connections
75
Figure 2.8 Dual Fiber Ethernet with 2 AVI/4 AFDI Voltage Option with Arc-Flash Detector Inputs, Devicenet Card, and Fast Hybrid 4 DI/4 DO Card (Relay MOT 751501AA3CA70850830)
75
Figure 2.9 Single Copper Ethernet, EIA-485 Communication, 8 DO (Form A) Card
76
Figure 2.10 Single Copper Ethernet with EIA-232 Communication, 10 RTD Card, 4 DI/4 DO Card and 2 AVI/4 AFDI Voltage Option Card with Arc-Flash Detector Inputs (Relay MOT 751501A1A9X70850230)
76
Figure 2.11 no Ethernet, EIA-232 Serial Communications, EIA-232/EIA-485 Communications Card, 8 DI Card, and 8 DO Card (Form A) (Relay MOT 751401AA03A2A850000)
77
Figure 2.12 Dual Copper Ethernet, 4 DI/4 DO Card, 14 DI Card, 8 AFDI with Arc-Flash Detector
77
With 5 a Phase, 200 Ma Neutral, and Three-Phase LEA Voltage Inputs (8 Vac Relay MOT 751501A4A2BL0L70671)
78
Figure 2.13 Dual Copper Ethernet, 14 DI Card, 8 DO (Form B) Card, 2 AVI/4 AFDI Card
78
Figure 2.14 Dual 10/100 Base-T Ethernet, EIA-232 Rear Port, Without Single Multimode
78
Figure 2.15 Control I/O Connections-4 AI/4 AO Option in Slot D and Fiber-Optic Port in Slot B
81
Figure 2.16 Control I/O Connections-Internal RTD Option in Slot D
81
AC/DC Control Connection Diagrams
82
Figure 2.17 Analog Output Wiring Example
82
Table 2.18 Typical Maximum RTD Lead Length
82
Figure 2.18 Output OUT103 Relay Output Contact Configuration
82
Figure 2.19 OUT103 Contact Fail-Safe and Nonfail-Safe Options
83
Figure 2.20 Single-Phase Voltage Connections
84
Figure 2.21 Voltage Connections
85
Figure 2.22 Typical Current Connections
87
Figure 2.23 SEL-751 Provides Overcurrent Protection and Reclosing for a Distribution Feeder (Includes Fast Bus Trip Scheme) (Delta-Connected Pts)
88
Figure 2.24 SEL-751 Provides Overcurrent Protection for a Distribution Bus (Includes Fast Bus Trip Scheme) (Wye-Connected Pts)
89
Figure 2.25 Transmission Line Directional Overcurrent Protection and Reclosing with Current-Polarization Source Connected to Channel in (Wye-Connected Pts)
90
Figure 2.26 SEL-751 Provides Overcurrent Protection for a Delta-Wye Transformer Bank (Wye-Connected Pts)
91
Figure 2.27 SEL-751 Provides Overcurrent Protection for a Transformer Bank with a Tertiary Winding (Wye-Connected Pts)
92
Figure 2.28 SEL-751 Provides Overcurrent Protection for an Industrial Distribution Feeder (Core-Balance Current Transformer Connected to Channel IN)
93
Figure 2.29 SEL-751 Provides Overcurrent Protection for a High-Impedance or Low-Impedance Grounded System (Wye-Connected Pts)
94
Figure 2.30 SEL-751 Provides Overcurrent Protection for a Petersen Coil-Grounded System (Wye-Connected Pts)
95
Figure 2.31 SEL-751 Provides Overcurrent Protection for an Ungrounded System (Wye-Connected Pts)
96
Figure 2.32 SEL-751 Provides Overcurrent Protection for an Ungrounded System (Open-Delta Connected Pts, Broken-Delta 3V0 Connection)
97
Figure 2.33 SEL-751 with a 2 AVI/4 AFDI Option Card and the Fiber-Optic-Based Point-Sensor
98
Arc-Flash Protection: System Installation
98
Figure 2.34 Black-Jacketed Fiber Installation Example
99
Figure 2.35 Point-Sensor Assembly
99
Figure 2.36 Point-Sensor Installation
99
Figure 2.37 Point-Sensor Directivity (0-360° Around the Mounting Plane)
100
Figure 2.38 Point-Sensor Directivity (Front to Back, above the Mounting Plane)
100
Figure 2.39 Point-Sensor Directivity (Left to Right, above the Mounting Plane)
101
Figure 2.40 Clear-Jacketed Fiber Sensor Assembly
101
Figure 2.41 Clear-Jacketed Fiber Sensor Mounting Example
102
Figure 2.42 Clear-Jacketed Fiber Sensor Components (V-Pin Style)
102
Figure 2.43 Clear-Jacketed Fiber Sensor Showing Transition from Clear- to Black-Jacketed Fiber Section
102
Figure 2.44 Switchgear Application Example
103
Figure 2.45 Bare-Fiber Sensor Assembly with Two Splices
104
Figure 2.46 Point Sensor Assembly
104
Table 2.19 Optical Budget Calculations
104
Figure 2.47 Bare-Fiber Sensor Assembly with Two Additional ST Splice Connectors
105
Field Serviceability
106
Figure 2.48 Point Sensor Assembly with Two V-Pin Splice Connectors
106
Overview
109
Table 3.1 SEL Software Solutions
109
Setup
110
Figure 3.1 Serial Port Communications Dialog Box
110
Table 3.2 AC SEL ERATOR Quickset SEL-5030 Software
110
Terminal
111
Figure 3.3 Network Communication Parameters Dialog Box
111
Figure 3.4 Communications Menu
111
Settings Database Management and Drivers
112
Figure 3.5 Device Response to the ID Command
112
Settings
114
Table 3.3 File/Tools Menus
115
Figure 3.6 Selection of Drivers
115
Figure 3.7 Update Part Number
116
Figure 3.8 New Setting Screen
116
Figure 3.9 Expressions Created with Expression Builder
118
Event Analysis
119
Figure 3.10 Composite Screens for Retrieving Events
119
Figure 3.11 Saving the Retrieved Event
120
Meter and Control
121
Figure 3.12 Device Overview Screen
121
Figure 3.13 Control Screen
122
Figure 3.14 Remote Operation Selection
123
Figure 3.15 Language Support Options
123
Figure 3.16 Spanish Settings Quickset Display
124
Figure 3.17 Spanish Control Window (Ventana de Control) Display
125
Table 3.4 Quickset Help
126
Overview
127
Application Data
129
Table 4.1 Identifier Settings
129
Table 4.2 CT Configuration Settings
130
Table 4.3 Voltage Configuration Settings
130
Table 4.4 Effect on Group Settings When SINGLEV := y
131
Table 4.5 Main Relay Functions that Change with VNOM := off
133
Figure 4.1 Low-Energy Analog Voltage Sensor (Capacitive Voltage Divider)
133
Table 4.6 Line Parameter Settings
136
Table 4.7 Fault Locator Setting
137
Table 4.8 Maximum Phase Overcurrent Settings
138
Table 4.9 Neutral Overcurrent Settings
139
Figure 4.2 Instantaneous Overcurrent Element Logic
140
Table 4.10 Residual Overcurrent Settings
141
Table 4.11 Negative-Sequence Overcurrent Settings
141
Figure 4.3 Instantaneous Overcurrent Element Pickup Time Curve
142
Figure 4.4 Instantaneous Overcurrent Element Reset Time Curve
142
Table 4.12 A-, B-, and C-Phase Time-Overcurrent Settings
143
Table 4.13 Maximum Phase Time-Overcurrent
144
Figure 4.5 Phase Time-Overcurrent Elements 51AT, 51BT, and 51CT
144
Table 4.14 Negative-Sequence Time-Overcurrent Settings
145
Figure 4.6 Maximum Phase Time-Overcurrent Elements 51P1T and 51P2T
145
Table 4.15 Neutral Time-Overcurrent Settings
146
Figure 4.7 Negative-Sequence Time-Overcurrent Element 51QT
146
Table 4.16 Residual Time-Overcurrent Settings
147
Figure 4.8 Neutral Time-Overcurrent Elements 51N1T and 51N2T
147
Figure 4.9 Residual Time-Overcurrent Elements 51G1T and 51G2T
148
Table 4.17 Equations Associated with U.S. Curves
149
Table 4.18 Equations Associated with IEC Curves
149
Figure 4.13 U.S. Extremely Inverse Curve: U4
150
Figure 4.10 U.S. Moderately Inverse Curve: U1
150
Figure 4.11 U.S. Inverse Curve: U2
150
Figure 4.12 U.S. very Inverse Curve: U3
150
Figure 4.14 U.S. Short-Time Inverse Curve: U5
151
Figure 4.15 IEC Class a Curve (Standard Inverse): C1
151
Figure 4.16 IEC Class B Curve (very Inverse): C2
151
Figure 4.17 IEC Class C Curve (Extremely Inverse): C3
151
Figure 4.18 IEC Long-Time Inverse Curve: C4
152
Figure 4.19 IEC Short-Time Inverse Curve: C5
152
Figure 4.21 General Logic Flow of Directional Control for Neutral Ground and Residual Ground Overcurrent Elements (Ungrounded/High-Impedance Grounded Systems; ORDER := U)
154
Table 4.19 Available Ground Directional Elements
154
Table 4.20 Best Choice Ground Directional Element Logic
155
Table 4.21 Ground Directional Element Availability by Voltage Connection Settings
156
Table
157
Figure 4.22 Logic for Relay Word Bit GNDSW
158
Table
159
Table
160
Table
161
Table
162
Figure 4.23 Internal Enables (DIRQE and DIRQGE) Logic for Negative-Sequence Voltage-Polarized Directional Elements
162
Table
163
Figure 4.24 Internal Enables (DIRVE and DIRIE) Logic for Zero-Sequence Voltage-Polarized and Channel in Current-Polarized Directional Elements
163
Table
164
Figure 4.25 Internal Enable (DIRNE) Logic for Zero-Sequence Voltage-Polarized Directional Elements (Low-Impedance Grounded, Petersen Coil-Grounded, and Ungrounded/High-Impedance Grounded Systems)
164
Table
165
Figure 4.26 Negative-Sequence Voltage-Polarized Directional Element for Neutral Ground and Residual Ground Overcurrent Elements
165
Table
166
Figure 4.27 Zero-Sequence Voltage-Polarized Directional Element
166
Figure 4.28 Channel in Current-Polarized Directional Element
167
Figure 4.29 Zero-Sequence Voltage-Polarized Directional Element (Low-Impedance Grounded Systems)
168
Figure 4.30 Wattmetric and Incremental Conductance Directional Elements (Petersen Coil-Grounded Systems)
169
Figure 4.31 Zero-Sequence Voltage-Polarized Directional Element (Ungrounded/High-Impedance Grounded Systems)
170
Figure 4.32 Routing of Directional Elements to Residual Ground Overcurrent Elements
171
Figure 4.33 Routing of Directional Elements to Neutral Ground Overcurrent Elements
171
Figure 4.34 Direction Forward/Reverse Logic for Residual Ground Overcurrent Elements
172
Figure 4.35 Direction Forward/Reverse Logic for Neutral Ground Overcurrent Elements
173
Figure 4.36 General Logic Flow of Directional Control for Negative-Sequence and Phase Overcurrent Elements
174
Figure 4.37 Negative-Sequence Voltage-Polarized Directional Element for Negative-Sequence and Phase Overcurrent Elements
176
Figure 4.38 Positive-Sequence Voltage-Polarized Directional Element for Phase Overcurrent Elements
177
Figure 4.39 Routing of Directional Elements to Negative-Sequence and Phase Overcurrent Elements
178
Figure 4.40 Direction Forward/Reverse Logic for Negative-Sequence Overcurrent Elements
178
Figure 4.41 Direction Forward/Reverse Logic for Phase Overcurrent Elements
179
Table 4.22 Directional Control Settings
179
Table 4.23 Wattmetric Settings
180
Table
181
Table 4.24 Directional Control Settings Not Made for Particular Conditions
182
Figure 4.42 Traditional Channel in Current-Polarized Directional Element
187
Figure 4.43 Current-Polarized Directional Element Characteristic When INMTA 0.00
188
Table
189
Table 4.25 Overcurrent Elements Controlled by Level Direction Settings DIR1 through DIR4 (Corresponding Overcurrent Element Figure Numbers in Parentheses)
182
Table
184
Table
185
Figure 4.44 Zero-Sequence Impedance Network and Relay Polarity
190
Figure 4.45 Zero-Sequence Impedance Plot for Solidly-Grounded, Mostly Inductive System
190
Figure 4.46 Low-Impedance Grounded Distribution System with a Ground Fault on Feeder
191
Figure 4.47 Zero-Sequence Impedance Network for Low-Impedance Grounded Distribution System with a Ground Fault on Feeder
192
Figure 4.50 Zero-Sequence Impedance Plots for Ground Fault on Low-Impedance Grounded Distribution System
194
Figure 4.51 Z0MTA Setting Provides Forward/Reverse Ground Fault Discrimination in a Low-Impedance Grounded Distribution System
195
Figure 4.52 Zero-Sequence Impedance Network for Ground Fault on Feeder 1
198
Figure 4.53 Wattmetric Element Operation for Ground Fault on Feeder 1
199
Table
200
Table 4.26 Effect of Settings VSCONN and DELTA_Y on Petersen Coil Directional Elements
202
Table 4.27 Load-Encroachment Settings
204
Figure 4.54 Load-Encroachment Logic
205
Table
207
Figure 4.55 High-Impedance Fault Current Levels Depend on Ground Surface Type
207
Table
209
Figure 4.56 HIF Detection Block Diagram
209
Table 4.28 High-Impedance Fault (HIF) Detection Settings
210
Table 4.29 HIF Relay Word Bits
211
Figure 4.57 A-Phase Second Harmonic Blocking
212
Table 4.30 Second-Harmonic Blocking Settings
213
Figure 4.58 Three-Phase Second- and Fifth-Harmonic Blocking Logic
213
Table 4.31 RTD Settings
215
Table 4.32 RTD Resistance Versus Temperature
216
Figure 4.59 Thermal Alarm and Trip Logic
220
Figure 4.60 Thermal Element Current Overload Logic
220
Table 4.33 IEC Thermal Element Settings
222
Table 4.34 Undervoltage Function
223
Table 4.35 Overvoltage Function
224
Figure 4.61 Undervoltage Element Logic
225
Figure 4.62 Overvoltage Element Logic
226
Table 4.36 Operating Quantities for the 27I Element
227
Figure 4.63 Logic Diagram of the Inverse-Time Undervoltage Element
227
Table 4.37 Inverse-Time Undervoltage Settings
228
Table 4.38 Specification of Inverse-Time Undervoltage Protection Element
228
Figure 4.64 Inverse Time-Undervoltage Element Curves
229
Table 4.39 Operating Quantities for the 59I Element
229
Figure 4.65 Logic Diagram of the Inverse-Time Overvoltage Element
230
Table 4.40 Inverse-Time Overvoltage Settings
230
Figure 4.66 Inverse Time-Overvoltage Element Curves
231
Table 4.41 Specification of Inverse-Time Overvoltage Protection Element
231
Figure 4.67 Synchronism-Check Voltage Window and Slip Frequency Elements
232
Figure 4.68 Synchronism-Check Elements
233
Table 4.42 Synchronism-Check Settings
234
Figure 4.69 Angle Difference between VP and VS Compensated by Breaker Close Time (Fp < Fs and VP Shown as Reference in this Example)
238
Table 4.43 Voltages When Setting SINGLEV := y
241
Table 4.44 Power Element Settings
241
Figure 4.70 Three-Phase Power Elements Logic
242
Figure 4.71 Power Elements Operation in the Real/Reactive Power Plane
243
Table 4.45 Power Factor Settings
243
Figure 4.72 Power Factor Elements Logic
244
Table 4.46 Loss-Of-Potential (LOP) Setting
245
Figure 4.73 Loss-Of-Potential (LOP) Logic
246
Figure 4.74 Logic Diagram of the Vector Shift Element
247
Table 4.47 Vector Shift Element Settings
249
Table 4.48 Frequency Settings
249
Figure 4.75 Over- and Underfrequency Element Logic
250
Table 4.49 Rate-Of-Change-Of-Frequency Settings
250
Figure 4.76 81R Frequency Rate-Of-Change Scheme Logic
251
Table 4.50 Time Window Versus 81Rntp Setting
251
Figure 4.77 81RF Characteristics
252
Table 4.51 Fast Rate-Of-Change-Of-Frequency Settings
253
Figure 4.78 81RF Fast Rate-Of-Change-Of-Frequency Logic
254
Table 4.52 Trip/Close Logic Settings
255
Figure 4.79 Trip Logic
255
Figure 4.81 Reclose Supervision Logic (Following Open Interval Time-Out)
258
Figure 4.82 Reclose Supervision Limit Timer Operation
259
Figure 4.83 SEL-751 Relays Installed at both Ends of a Transmission Line in a High-Speed Reclose Scheme
262
Figure 4.84 Reclosing Relay States and General Operation
264
Table 4.53 Relay Word Bit and Front-Panel Correspondence to Reclosing Relay States
265
Table 4.54 Reclosing Control Settings
267
Figure 4.85 Reclosing Sequence from Reset to Lockout with Example Settings
268
Table 4.55 Shot Counter Correspondence to Relay Word Bits and Open Interval Times
270
Table 4.56 Open Interval Time Example Settings
274
Figure 4.86 Reclose Blocking for Islanded Generator
274
Figure 4.87 Sequence Coordination between the SEL-751 and a Line Recloser
277
Figure 4.88 Operation of SEL-751 Shot Counter for Sequence Coordination with Line Recloser (Additional Settings Example 1)
277
Table 4.57 Demand Meter Settings
280
Figure 4.90 Demand Current Logic Outputs
280
Figure 4.91 Response of Thermal and Rolling Demand Meters to a Step Input (Setting DMTC = 15 Minutes)
281
Figure 4.92 Voltage VS Applied to Series RC Circuit
282
Logic Settings (SET L Command)
284
Table 4.58 Enable Settings
284
Table 4.59 Latch Bits Equation Settings
285
Figure 4.93 Schematic Diagram of a Traditional Latching Device
285
Figure 4.94 Logic Diagram of a Latch Switch
285
Figure 4.96 Result of Falling-Edge Operator on a Deasserting Input
290
Table 4.62 SEL OGIC Variable Settings
291
Table 4.63 Counter Input/Output Description
292
Table 4.64 Order of Precedence of the Control Inputs
293
Figure 4.99 Example of the Effects of the Input Precedence
293
Table 4.65 Control Output Equations and Contact Behavior Settings
294
Table 4.66 General Global Settings
295
Figure 4.100 Phase Rotation Setting
295
Table 4.67 Event Messenger Settings
296
Table 4.68 Setting Group Selection
297
Table 4.69 LEA Ratio and Phase Correction Settings for Phase Voltages
297
Table 4.70 LEA Ratio and Phase Correction Settings for Synchronism-Check Voltage
298
Table 4.71 Time and Date Management Settings
298
Table 4.72 Breaker Failure Setting
300
Figure 4.101 Breaker Failure Logic
301
Figure 4.102 Arc-Flash Instantaneous Overcurrent Element Logic
302
Table 4.73 Arc-Flash Overcurrent Settings
302
Table 4.74 Arc-Flash Time-Overlight Settings
303
Figure 4.103 Inverse Time-Overlight Element Logic
304
Figure 4.104 TOL Element Inverse Curve Characteristic
304
Table 4.75 Typical Ambient Illumination Light Levels
305
Figure 4.105 Analog Input Card Adaptive Name
306
Table 4.76 Summary of Steps
307
Figure 4.106 Settings to Configure Input 1 as a 4-20 Ma Transducer Measuring Temperatures between -50°C and 150°C
309
Table 4.77 Analog Input Card Settings in Slot
309
Figure 4.107 Analog Output Number Allocation
310
Table 4.78 Analog Output Card Settings in Slot 3
310
Figure 4.108 Analog Output Settings
311
Figure 4.109 DC Mode Processing
312
Figure 4.110 AC Mode Processing
312
Figure 4.111 Timing Diagram for Debounce Timer Operation When Operating in AC Mode
312
Table 4.81 Setting Change Disable Setting
313
Table 4.79 Slot C Input Debounce Settings
313
Table 4.80 Data Reset Settings
313
Table 4.82 Time Synchronization Source Setting
314
Table 4.83 Front-Panel Serial Port Settings
314
Table 4.84 Ethernet Port Settings
315
Table 4.85 Port Number Settings that Must be Unique
316
Table 4.86 Fiber-Optic Serial Port Settings
317
Table 4.87 Rear-Panel Serial Port (EIA-232) Settings
317
Table 4.88 Rear-Panel Serial Port (EIA-232/EIA-485) Settings
318
Table 4.89 Rear-Panel Devicenet Port Settings
319
Front-Panel Settings (SET F Command)
319
Table 4.90 Display Point and Local Bit Default Settings
320
Table 4.91 LCD Display Settings
320
Table 4.92 Settings that Always, Never, or Conditionally Hide a Display Point
322
Table 4.93 Entries for the Four Strings
322
Figure 4.112 Display Point Settings
323
Figure 4.113 Front-Panel Display-Both HV and LV Breakers Open
323
Figure 4.114 Front-Panel Display-HV Breaker Closed, LV Breaker Open
323
Figure 4.115 Front-Panel Display-Both HV and LV Breakers Closed
324
Table 4.94 Binary Entry in the Name String Only
324
Figure 4.116 Front-Panel Display-HV Breaker Open, LV Breaker Closed
324
Figure 4.117 Front-Panel Display-HV Breaker Open, LV Breaker Closed
324
Figure 4.118 Front-Panel Display for a Binary Entry in the Name String Only
324
Table 4.95 Analog Entry in the Name String Only
325
Figure 4.119 Front-Panel Display for an Analog Entry in the Name String Only
325
Table 4.97 Example Settings and Displays
326
Table 4.96 Entry in the Name String and the Alias Strings
326
Figure 4.120 Front-Panel Display for an Entry in (A) Boolean Name and Alias Strings and (B) Analog Name and User Text and Formatting Strings
326
Figure 4.121 Front-Panel Display for an Entry in (A) Boolean Name and Alias Strings and (B) Analog Name, User Text and Formatting Strings, and Engineering Units
326
Figure 4.122 Adding Temperature Measurement Display Points
327
Figure 4.123 Rotating Display
327
Figure 4.124 Adding Two Local Bits
328
Table 4.98 Target LED Settings
329
Table 4.99 Pushbutton LED Settings
330
Report Settings (SET R Command)
331
Table 4.100 Auto-Removal Settings
332
Table 4.101 SER Trigger Settings
332
Table 4.102 Enable Alias Settings
332
Table 4.103 SET R SER Alias Settings
333
Table 4.104 Event Report Settings
333
Table 4.105 HIF Event Report Settings
334
Table 4.106 Load Profile Settings
334
Table 4.107 DNP Map Settings
334
Modbus Map Settings (SET M Command)
335
Table 4.108 User Map Register Settings
335
Overview
337
Figure 5.1 Complex Power Measurement Conventions
338
Table 5.1 Measured Fundamental Meter Values
339
Table 5.2 Thermal Meter Values
341
Figure 5.3 METER T Command Report with Rtds
342
Table 5.3 RTD Input Status Messages
342
Figure 5.4 METER E Command Response
343
Figure 5.5 METER RE Command Response
343
Table 5.4 Maximum/Minimum Meter Values
343
Figure 5.6 METER M Command Response
344
Figure 5.7 METER RM Command Response
344
Figure 5.8 METER MV Command Response
345
Figure 5.9 METER RMS Command Response
345
Table 5.5 RMS Meter Values
345
Figure 5.10 METER AI Command Response
346
Figure 5.11 METER L (Light) Command Response
346
Figure 5.12 MET de Command Response
347
Table 5.6 Demand Values
347
Figure 5.13 MET PE Command Response
347
Table 5.7 Synchrophasor Measured Values
348
Figure 5.14 MET RA Command Response
349
Table 5.8 High-Impedance Fault Metering Measured Values
349
Figure 5.15 MET H (HIF) Command Response
349
Load Profiling
350
Table 5.9 Station DC Battery Monitor Settings
351
Figure 5.16 LDP Command Response
351
Figure 5.17 DC Under- and Overvoltage Elements
352
Breaker Monitor
355
Table 5.10 Breaker Maintenance Information for a 25 Kv Circuit Breaker
355
Table 5.11 Breaker Monitor Settings
356
Figure 5.19 Plotted Breaker Maintenance Points for a 25 Kv Circuit Breaker
357
Figure 5.20 SEL-751 Breaker Maintenance Curve for a 25 Kv Circuit Breaker
358
Figure 5.22 Breaker Monitor Accumulates 10 Percent Wear
360
Figure 5.23 Breaker Monitor Accumulates 25 Percent Wear
361
Figure 5.24 Breaker Monitor Accumulates 50 Percent Wear
362
Figure 5.25 Breaker Monitor Accumulates 100 Percent Wear
363
Figure 5.26 Input Inxxx Connected to Trip Bus for Breaker Monitor Initiation
365
Overview
367
Table 6.1 Methods of Accessing Settings
367
View/Change Settings with the Two-Line Front Panel
368
Figure 6.1 Front-Panel Setting Entry Example
369
View/Change Settings with the Touchscreen Front Panel
370
Table 6.2 SHOW Command Options
370
Table 6.3 SET Command Options
370
Table 6.4 SET Command Editing Keystrokes
371
Setting Entry Error Messages
372
Table SET.1 Range Dependencies for the EDIR Setting
378
Table SET.2 Range Dependencies for the ORDER Setting
378
Table SET.3 Range Dependencies for 27I Operating Quantities
385
Table SET.4 Range Dependencies for 59I Operating Quantities
386
Table SET.5 Port Number Settings that Must be Unique
423
Table 6.5 SET Command Format
372
Appendix G: IEC 60870-5-103 Communications
451
Overview
451
Table 7.1 SEL-751 Communications Port Interfaces
451
Figure 7.1 Simple Ethernet Network Configuration
453
Figure 7.2 Ethernet Network Configuration with Dual Redundant Connections (Failover Mode)
454
Figure 7.3 Ethernet Network Configuration with Ring Structure (Switched Mode)
454
Figure 7.4 IRIG-B Input (Relay Terminals B01-B02)
456
Table 7.2 PRP Settings
456
Figure 7.5 IRIG-B Input Via EIA-232 Port 3 (SEL Communications Processor as Source)
457
Figure 7.6 IRIG-B Input Via EIA-232 Port 3 (SEL-2401/2404/2407 Time Source)
457
Figure 7.7 IRIG-B Input Via Fiber-Optic EIA-232 Port 2 (SEL-2030/2032 Time Source)
457
Figure 7.8 IRIG-B Input Via Fiber-Optic EIA-232 Port 2 (SEL-2401/2404/2407 Time Source)
458
Figure 7.9 EIA-232 DB-9 Connector Pin Numbers
458
Table 7.3 EIA-232/EIA-485 Serial Port Pin Functions
458
Table
459
Figure 7.10 SEL Cable C234A-SEL-751 to DTE Device
459
Figure 7.11 SEL Cable C227A-SEL-751 to DTE Device
459
Figure 7.12 SEL Cable C222-SEL-751 to Modem
460
Figure 7.13 SEL Cable C272A-SEL-751 to SEL Communications Processor Without IRIG-B Signal
460
Figure 7.14 SEL Cable C273A-SEL-751 to SEL Communications Processor with IRIG-B Signal
460
Figure 7.15 SEL Cable C387-SEL-751 to SEL-3010
460
Communications Protocols
461
Table 7.4 Protocols Supported on the Various Ports
461
Table 7.5 Settings Associated with SNTP
465
Figure
466
Table 7.6 Serial Port Automatic Messages
467
Table 7.7 Command Response Header Definitions
469
Table 7.8 Access Commands
470
Table
472
Figure 7.16 AFT Command Response
472
Table 7.9 ANALOG Command
473
Figure 7.17 Breaker Monitor Report
474
Figure 7.18 Breaker Wear Report
475
Figure 7.19 Breaker Reset Response
475
Figure 7.20 CEV HIF Command Response
476
Table
477
Table 7.10 COM Command
478
Table 7.11 CONTROL Command
478
Table 7.12 Three Remote Bit States
479
Table 7.13 COPY Command
479
Table 7.14 COUNTER Command
479
Table 7.15 Date Command
479
Figure 7.21 Ethernet Port (PORT 1) Status Report When NETMODE := PRP
480
Figure 7.22 Ethernet Port (PORT 1) Status Report When NETMODE := FIXED
480
Figure 7.23 Ethernet Port (PORT 1) Status Report When NETMODE := FAILOVER, E61850 := Y, and EGSE := y
481
Figure 7.24 Ethernet Port (PORT 1) Status Report When NETMODE := SWITCHED
481
Table 7.16 EVENT Command (Event Reports)
482
Table 7.17 FILE Command
482
Figure 7.25 Ethernet Port (PORT 1) Status Report for the Single Ethernet Port Option
482
Table 7.18 GOOSE Command Variants
483
Figure 7.26 GOOSE Command Response
485
Table 7.19 GROUP Command
486
Table 7.21 HISTORY Command
487
Table 7.22 HIS HIF Command
487
Table 7.23 HSG Command
488
Figure 7.27 HSG Command Response
488
Table 7.24 IDENTIFICATION Command
489
Table 7.25 INI HIF Command
489
Table 7.26 IRI Command
489
Table 7.27 LDP Commands
490
Table 7.28 L_D Command (Load Firmware)
490
Table 7.29 LOG HIF Command
491
Figure 7.28 LOG H (HIF) Command Response
491
Table 7.31 Meter Command
492
Table 7.32 Meter Class
493
Table 7.33 PASSWORD Command
494
Table 7.34 Factory-Default Passwords for Access Levels 1, 2, and C
494
Table 7.35 Valid Password Characters
494
Figure 7.29 PING Command Response
495
Table 7.36 PUL Outnnn Command
496
Table 7.37 QUIT Command
496
Table 7.38 R_S Command (Restore Factory-Defaults)
496
Table 7.39 SER Command (Sequential Events Recorder Report)
497
Table 7.40 SER D Command
497
Table 7.41 SET Command (Change Settings)
498
Table 7.42 SET Command Editing Keystrokes
498
Figure 7.30 SHOW Command Example
499
Table 7.43 SHOW Command (Show/View Settings)
499
Table 7.44 STATUS Command (Relay Self-Test Status)
501
Table 7.45 STATUS Command Report and Definitions
501
Figure 7.31 Typical Relay Output for STATUS S Command
502
Table 7.47 SUM HIF Command
503
Table 7.48 TARGET Command (Display Relay Word Bit Status)
503
Table 7.49 Front-Panel Leds and the TAR 0 Command
504
Table 7.50 TEST DB Commands
504
Figure 7.32 the Command Example
506
Table 7.51 the Command (Preload or Reset Thermal Capacity)
506
Table 7.52 TIME Command (View/Change Time)
506
Table 7.53 TRIGGER Command (Trigger Event Report)
507
Table 7.54 TRIGGER HIF Command
507
Table 7.55 VEC Command
507
Figure 7.33 CFG.TXT File
508
Table 7.56 FTP and MMS Virtual File Structure
508
Table 7.57 Settings Directory Files
510
Table 7.58 Reports Directory Files
510
Table 7.59 Event Directory Files
511
Table 7.60 Files Available for Ymodem Protocol
512
Table 7.61 FTP and MMS Wildcard Usage Examples
513
Table 7.62 Ymodem Wildcard Usage Examples
513
Appendix H: Devicenet Communications
515
Overview
515
Figure 8.1 SEL-751 Front-Panel Models
515
Two-Line Display Front Panel
516
Figure 8.2 Front-Panel Overview
516
Table 8.1 Front-Panel Automatic Messages (FP_AUTO := OVERRIDE)
517
Figure 8.3 Access Level Security Padlock Symbol
518
Figure 8.4 Password Entry Screen
518
Figure 8.5 Front-Panel Pushbuttons
519
Table 8.2 Front-Panel Pushbutton Functions
519
Figure 8.6 Main Menu
520
Figure 8.7 MAIN Menu and METER Submenu
520
Figure 8.8 METER Menu and ENERGY Submenu
520
Figure 8.9 Relay Response When Energy (or Max/Min, Demand, Peak Demand) Metering Is Reset
521
Figure 8.10 Relay Response When no Analog Cards Are Installed
521
Figure 8.11 Relay Response When no Math Variables Enabled
521
Figure 8.12 MAIN Menu and EVENTS Submenu
521
Figure 8.13 EVENTS Menu and DISPLAY Submenu
522
Figure 8.14 Relay Response When no Event Data Available
522
Figure 8.15 Relay Response When Events Are Cleared
522
Figure 8.16 MAIN Menu and TARGETS Submenu
522
Figure 8.17 TARGETS Menu Navigation
523
Figure 8.18 MAIN Menu and CONTROL Submenu
523
Figure 8.19 CONTROL Menu and OUTPUTS Submenu
524
Figure 8.20 CONTROL Menu and LOCAL BITS Submenu
524
Figure 8.21 MAIN Menu and SET/SHOW Submenu
525
Figure 8.22 SET/SHOW Menu
526
Figure 8.23 MAIN Menu and Status Submenu
526
Figure 8.24 MAIN Menu and Breaker Submenu
527
Figure 8.25 Factory Default Front-Panel Leds
527
Table 8.3 Possible Warning Conditions (Flashing TRIP LED)
528
Figure 8.27 Operator Control Pushbuttons and Leds
529
Figure 8.26 Target Reset Pushbutton
529
Table 8.4 SEL-751 Front-Panel Operator Control Functions
530
Figure 8.28 Touchscreen Display Components and Indicators
532
Touchscreen Display Front Panel
532
Table 8.5 Touchscreen Display Component and Indicator Descriptions
533
Table 8.6 Front-Panel Automatic Messages
534
Table 8.7 Sidebar Buttons
535
Figure 8.29 Home (Default FPHOME Setting)
535
Table 8.8 Home Folders and Applications
536
Figure 8.30 Bay Screens Application
536
Figure 8.31 Meter Applications
537
Table 8.9 Meter Application Availability
537
Figure 8.32 Meter Phasors
538
Figure 8.33 Meter Fundamental
538
Figure 8.34 Meter Energy
538
Figure 8.35 Meter Energy Reset
538
Table 8.10 Monitor Application Availability
539
Figure 8.36 Monitor Applications
539
Figure 8.37 Breaker Wear Trips
539
Figure 8.38 Breaker Wear A, B, C, and Last Reset
539
Table 8.11 Reports Application Availability
540
Figure 8.39 Monitor Relay Word Bits
540
Figure 8.40 Search Relay Word Bits
540
Figure 8.41 Reports Applications
540
Figure 8.44 Sequential Events Recorder
541
Figure 8.45 Control Applications
541
Table 8.12 Control Application Availability
542
Figure 8.46 Local Bits Confirmation
542
Figure 8.47 Digital Output Pulsing-Slot a
542
Figure 8.48 Digital Output Pulsing Confirmation
542
Figure 8.49 Local Bits
543
Figure 8.50 Local Bits Notification
543
Figure 8.51 Local Bits Confirmation
543
Figure 8.52 Device Info Applications
543
Table 8.13 Device Info Application Availability
544
Figure 8.53 Device Status
544
Figure 8.54 Device Configuration
544
Figure 8.55 Model Number Confirmation
544
Figure 8.56 Trip and Diagnostic Messages
545
Figure 8.57 Arc-Flash Diagnostics
545
Figure 8.58 Arc-Flash Diagnostics Confirmation
545
Figure 8.59 Access Level Applications
545
Table 8.14 Access Level Application Availability
546
Figure 8.60 Authentication
546
Figure 8.61 Login Confirmation
546
Figure 8.62 Settings Folders and Applications
546
Table 8.15 Settings Folder and Application Availability
547
Table 8.16 Settings Folders Port, Group, and Date and Time Application Availability
547
Figure 8.63 Port Settings
548
Figure 8.64 Group Settings
548
Figure 8.65 Set 1 Settings
548
Figure 8.66 Max Phase Overcurrent Settings
548
Figure 8.67 Set/Show Settings Edit
548
Figure 8.68 Touchscreen Settings
549
Figure 8.69 Touchscreen Settings Edit
549
Figure 8.70 Rotating Display
549
Appendix D: DNP3 Communications
559
Overview
559
Figure
560
Table 9.1 Circuit Breaker Symbols
560
Table 9.2 Disconnect Settings
561
Table 9.3 Two-Position Disconnect Symbols
561
Figure 9.1 Dual-Point Disconnect Status Logic
561
Table 9.4 Local/Remote Breaker Control Settings
562
Figure 9.2 Local/Remote Control Mode Indication
562
Figure 9.3 Bay Screens Application Display with a Single-Line Diagram
563
Figure 9.4 Breaker Control Application
563
Figure 9.5 Quickset Front-Panel Options
564
Table 9.5 Touchscreen Settings
565
Figure 9.6 Quickset Touchscreen Settings
565
Figure
567
Figure 9.7 Layout of Bay Screen Builder
568
Figure 9.8 Project Analysis Pane: Analysis Results Tab
570
Figure 9.9 Project Analysis Pane: Constraints Summary Tab
570
Figure 9.10 Bay Control Single-Line Diagram Schematic
571
Figure 9.11 Device Part Number Touchscreen Configuration Option
572
Figure 9.12 Quickset Bay Control Project Management and Project Preview Display
572
Figure 9.13 Open Single-Line Diagram in Bay Screen Builder
573
Figure 9.14 Drag-And-Drop Symbols
573
Table 9.6 Symbols Required for the Single-Line Diagram Schematic in Figure
574
Figure 9.15 Selected Breaker Symbol Settings Displayed in the Properties Pane
575
Figure 9.16 Close/Open/Alarm Color Property Drop down Menu
575
Figure 9.17 Publish Bay Screen Builder Project to Quickset
576
Figure 9.18 Quickset Updated Single-Line Diagram and Corresponding Settings
576
Figure
578
Figure 9.19 Final Bay Screen Builder Rendering
580
Figure 9.20 Import/Export of the Bay Control Screen in Quickset
581
Figure 9.21 Main Bus and Transfer Bus Bay Control Single-Line Diagram
581
Figure 9.22 Tie Breaker Bay Control Single-Line Diagram
582
Figure 9.23 Bus 1 and Bus 2 Bay Control Single-Line Diagram
582
Figure 9.24 Feeder Bay Control Single-Line Diagram
582
Figure 9.25 Incomer with Step-Down Transformer Bay Control Single-Line Diagram
582
Appendix E: Modbus RTU Communications
583
Overview
583
Event Reporting
584
Figure 10.1 Example Event Summary
585
Table 10.1 Event Types
586
Table 10.2 Phase Involvement Event Type
587
Figure 10.2 Sample Event History
590
Table 10.3 Event Report Current and Voltage Columns
591
Table 10.4 Output, Input, Protection, and Control Element Event Report Columns
592
Figure 10.3 Example Standard 15-Cycle Event Report 1/4-Cycle Resolution
594
Figure 10.4 Derivation of Event Report Current Values and RMS Current Values from Sampled Current Waveform
599
Figure 10.5 Derivation of Phasor RMS Current Values from Event Report Current Values
600
Figure 10.6 Sample Compressed ASCII Event Report
601
Figure 10.7 Sample CEV Report Viewed with Analytic Assistant or
605
Figure 10.8 Options for Converting CEV Reports to COMTRADE in Analytic Assistant
606
Figure 10.9 Sample COMTRADE .HDR Header File
607
Figure 10.10 Sample COMTRADE .CFG Configuration File Data
610
High-Impedance Fault (HIF) Event Reporting
611
Figure 10.11 Sample HIF Event Summary Report
612
Table 10.5 CEV HIF Commands
612
Table 10.6 HIF Event Types
613
Table 10.7 HIF Event Phases
613
Table 10.8 HIF Downed Conductor
614
Table 10.9 SUM HIF Command
614
Figure 10.12 Sample Compressed ASCII HIF Summary
615
Figure 10.13 Sample HIF Event History
615
Figure 10.14 Sample Compressed HIF History Report
616
Table 10.10 HIS HIF Command
616
Figure 10.15 Sample HIF COMTRADE .HDR Header File
617
Figure 10.16 Sample HIF COMTRADE .CFG Configuration File Data
617
Figure 10.17 Example Sequential Events Recorder (SER) Event Report
619
Overview
621
Table 11.1 Resultant Scale Factors for Inputs
622
Figure 11.1 Low-Level Test Interface (J2 and J4)
622
Commissioning Tests
623
Figure 11.2 Three-Phase Wye AC Connections
625
Figure 11.3 Three-Phase Open-Delta AC Connections
625
Table 11.2 Serial Port Commands that Clear Relay Data Buffers
626
Table 11.3 Phase Current Measuring Accuracy
627
Figure 11.4 Current Source Connections
627
Table 11.4 Current Unbalance Measuring Accuracy
628
Figure 11.5 Wye Voltage Source Connections
628
Table 11.5 Power Quantity Accuracy-Wye Voltages
629
Figure 11.6 Delta Voltage Source Connections
629
Table 11.6 Power Quantity Accuracy-Delta Voltages
630
Periodic Tests (Routine Maintenance)
632
Figure 11.7 CEV R Light Event Capture Example
632
Table 11.7 Periodic Relay Checks
632
Self-Test
633
Table 11.8 Relay Self-Tests
634
Table 11.9 Troubleshooting
636
Factory Assistance
637
Firmware
639
Table A.1 R200 Series Firmware Revision History
639
Table A.2 R100 Series Firmware Revision History
641
Table A.3 SEL Display Package Revision History
645
Table A.4 SEL Display Package Compatibility with Relay Firmware
645
Table A.5 Devicenet Card Versions
646
Table A.6 EDS File Compatibility
646
Appendix A: Firmware, ICD, and Manual Versions
646
ICD File
646
Table A.7 SEL-751 ICD File Revision History
647
Table A.8 Instruction Manual Revision History
651
Modbus Register Map
653
Appendix B: Firmware Upgrade Instructions
661
Overview
661
Upgrade Firmware Using Quickset
662
Upgrade Firmware Using a Terminal Emulator
666
Figure B.1 Firmware File Transfer Process
667
Protocol Verification for Relays with IEC 61850 Option
668
Factory Assistance
669
Table C.1 Supported Serial Command Sets
671
Appendix C: SEL Communications Processors
671
SEL Communications Protocols
671
Table C.2 Compressed ASCII Commands
672
Figure C.1 SEL Communications Processor Star Integration Network
673
Table C.3 SEL Communications Processors Protocol Interfaces
674
Figure C.2 Multitiered SEL Communications Processor Architecture
674
SEL Communications Processor and Relay Architecture
675
Figure C.3 Enhancing Multidrop Networks with SEL Communications Processors
676
Figure C.4 Example of SEL Relay and SEL Communications Processor Configuration
677
Table C.6 SEL Communications Processor Port 1 Automatic Messaging Settings
678
Table C.7 SEL Communications Processor Port 1 Region Map
678
Table C.9 Communications Processor TARGET Region
679
Table C.4 SEL Communications Processor Port 1 Settings
677
Table C.5 SEL Communications Processor Data Collection Automessages
677
Table C.8 Communications Processor METER Region Map with the 2 AVI/4 AFD Card Installed
679
Table C.10 Communications Processor DEMAND Region Map
681
Figure C.5 Unsolicited Write Settings
682
Figure C.6 Setting Remote Analogs RA01 through RA13
684
Overview
685
Table D.1 DNP3 Implementation Levels
685
Table D.2 Selected DNP3 Function Codes
687
Table D.3 DNP3 Access Methods
688
Table D.4 TCP/UDP Selection Guidelines
690
Table D.5 DNP3 Access Methods
690
DNP3 in the SEL-751
690
Figure D.1 Application Confirmation Timing with URETRY N = 2
691
Figure D.2 Message Transmission Timing
692
Table D.6 SEL-751 Event Buffer Capacity
693
Table D.7 Port DNP3 Protocol Settings
695
Table D.8 Serial Port DNP3 Modem Settings
696
Table D.9 SEL-751 DNP Object List
698
Table D.10 DNP3 Reference Data Map
703
Table D.11 DNP3 Default Data Map
704
Table D.12 SEL-751 Object 12 Control Operations
707
Figure D.3 Sample Response to SHO DNP Command
708
Figure D.4 Port MAP Command
709
Table D.13 Sample Custom DNP3 AI Map
711
Figure D.7 AI Point Label, Scaling and Deadband in
712
Figure D.8 Sample Custom DNP3 AO Map Settings
713
Figure D.10 Sample Custom DNP3 BO Map Settings
714
Figure D.11 Binary Output Map Entry in AC SEL
714
Table E.1 Modbus Query Fields
716
Table E.2 SEL-751 Modbus Function Codes
716
Table E.3 SEL-751 Modbus Exception Codes
717
Table E.4 01H Read Discrete Output Coil Status Command
718
Table E.5 Responses to 01H Read Discrete Output Coil Query Errors
718
Table E.6 02H Read Input Status Command
718
Table E.7 02H SEL-751 Inputs
719
Table E.10 Responses to 03H Read Holding Register Query Errors
720
Table E.8 Responses to 02H Read Input Query Errors
720
Table E.9 03H Read Holding Register Command
720
Table E.11 04H Read Input Register Command
721
Table E.12 Responses to 04H Read Input Register Query Errors
721
Table E.13 05H Force Single Coil Command
721
Table E.14 01H, 05H SEL-751 Output
722
Table E.15 Responses to 05H Force Single Coil Query Errors
724
Table E.16 06H Preset Single Register Command
724
Table E.17 Responses to 06H Preset Single Register Query Errors
725
Table E.18 08H Loopback Diagnostic Command
725
Table E.19 Responses to 08H Loopback Diagnostic Query Errors
725
Table E.20 10H Preset Multiple Registers Command
726
Table E.21 10H Preset Multiple Registers Query Error Messages
726
Table E.22 60H Read Parameter Information Command
726
Table E.23 60H Read Parameter Descriptor Field Definition
727
Table E.24 60H Read Parameter Conversion Field Definition
727
Table E.25 Responses to 60H Read Parameter Information Query Errors
728
Table E.26 61H Read Parameter Text Command
728
Table E.27 61H Read Parameter Text Query Error Messages
729
Table E.28 62H Read Enumeration Text Command
729
Table E.29 61H Read Parameter Enumeration Text Query Error Messages
729
Table E.30 7Dh Encapsulated Packet with Control Command
729
Table E.31 7Dh Encapsulated Packet Query Errors
730
Table E.32 7Eh NOP Command
730
Table E.33 Modbus Register Labels for Use with SET M Command
732
Table E.34 Modbus Register Map
739
Appendix F: IEC 61850 Communications
777
Features
777
Table F.1 IEC 61850 Document Set
778
IEC 61850 Operation
779
Table F.2 Example IEC 61850 Descriptor Components
780
Table F.3 SEL-751 Logical Devices
780
Figure F.1 SEL-751 Datasets
782
Figure F.2 SEL-751 Predefined Reports
783
Figure F.3 GOOSE Quality
786
Table F.6 IEC 61850 Settings
787
Table F.7 New Logical Node Extensions
789
Table F.8 Arc-Flash Detection Logical Node Class Definition
789
Table F.9 Thermal Metering Data Logical Node Class Definition
789
Table F.10 Thermal Element Metering Data Logical Node Class Definition
790
Table F.11 Metering Statistics Logical Node Class Definition
791
Table F.12 Demand Metering Statistics Logical Node Class Definition
791
Table F.13 Compatible Logical Nodes with Extensions
792
Table F.14 Fault Locator Logical Node Class Definition
792
Table F.15 Circuit Breaker Logical Node Class Definition
793
Table F.16 Measurement Logical Node Class Definition
793
Table F.17 Measurement Logical Node Class Definition
794
Table F.18 Generic Process I/O Logical Node Class Definition
794
Table F.19 Circuit Breaker Supervision (Per-Phase) Logical Node Class Definition
794
Table F.20 Logical Device: PRO (Protection)
795
Table F.4 Buffered Report Control Block Client Access
784
Table F.5 Unbuffered Report Control Block Client Access
784
Logical Nodes
795
Table F.21 Logical Device: MET (Metering)
807
Table F.22 Logical Device: con (Remote Control)
811
Table F.23 Logical Device: ANN (Annunciation)
812
Table F.24 Logical Device: CFG (Configuration)
818
Table F.25 PICS for A-Profile Support
818
Table F.26 PICS for T-Profile Support
818
Protocol Implementation Conformance Statement
818
Table F.27 MMS Service Supported Conformance
819
Table F.28 MMS Parameter CBB
821
Table F.29 Alternateaccessselection Conformance Statement
821
Table F.30 Variableaccessspecification Conformance Statement
822
Table F.31 Variablespecification Conformance Statement
822
Table F.32 Read Conformance Statement
822
Table F.33 Getvariableaccessattributes Conformance Statement
822
Table F.34 Definenamedvariablelist Conformance Statement
822
Table F.35 Getnamedvariablelistattributes Conformance Statement
823
Table F.36 Deletenamedvariablelist
823
Table F.37 GOOSE Conformance
823
Table F.38 ACSI Basic Conformance Statement
824
Table F.39 ACSI Models Conformance Statement
824
ACSI Conformance Statements
824
Table F.40 ACSI Services Conformance Statement
825
Table G.1 IEC 60870-5 Standard Documents
829
Appendix I: Synchrophasors
829
Overview
829
Table G.2 IEC 60870-5 Enhanced Performance Architecture Model
830
Table G.3 History of IEC 60870-5
830
Table G.4 SEL-751 ASDU Types
831
Table G.5 IEC 60870-5-103 Category Map Settings
832
Table G.6 IEC 60870-5-103 Cause of Transmission
833
Table G.7 IEC 60870-5-103 Information Numbers
833
Table G.8 IEC 60870-5-103 Standard Function Types
834
Table G.9 IEC 60870-5-103 Data Map
834
Table G.10 SEL-751 IEC 60870-5-103 Port Settings
837
Table G.11 SEL-751 Analog Fault Quantities
838
IEC 60870-5-103 Documentation
840
Figure H.1 Devicenet Card Component Overview
841
Features
842
Electronic Data Sheet
843
Appendix J: MIRROREDBITS Communications
845
Overview
845
Figure I.1 Phase Reference
846
Synchrophasor Measurement
846
Figure I.2 Waveform at Relay Terminals May Have a Phase Shift
847
Figure I.3 Correction of Measured Phase Angle
847
Table I.1 PMU Settings in the SEL-751 for C37.118 Protocol in Global Settings
848
Settings for Synchrophasors
848
Table I.2 Synchrophasor Order in Data Stream (Voltages and Currents)
850
Table I.3 User-Defined Analog Values Selected by the NUMANA Setting
851
Table I.4 User-Defined Digital Status Words Selected by the NUMDSW Setting
851
Table I.5 SEL-751 Serial Port Settings for Synchrophasors
852
Table I.6 SEL-751 Ethernet Port Settings for Synchrophasors
853
Figure I.4 TCP Connection
854
Table I.7 Synchrophasor Trigger Relay Word Bits
855
Table I.8 Time Synchronization Relay Word Bits
855
Table I.9 TQUAL Bits Translation to Time Quality
856
View Synchrophasors Using the MET PM Command
857
Figure I.7 Sample MET PM Command Response
858
C37.118 Synchrophasor Protocol
858
Table I.10 Size of a C37.118 Synchrophasor Message
859
Table I.11 Serial Port Bandwidth for Synchrophasors (in Bytes)
859
IEEE C37.118 PMU Setting Example
860
Table I.12 Example Synchrophasor Global Settings
862
Table I.13 Example Synchrophasor Logic Settings
862
Table I.14 Example Synchrophasor SEL OGIC Settings
862
Table I.15 Example Synchrophasor Port Settings
862
Table J.
865
Table J.1 Number of MIRRORED BITS Messages for Different Data Rates
866
Table J.2 Positions of the MIRRORED BITS
867
Table J.3 MIRRORED BITS Values for a RXDFLT Setting of 10100111
867
Table J.4 MIRRORED BITS Communications Message Transmission Period
869
Table J.5 MIRRORED BITS Protocol Settings
869
Table K.1 SEL OGIC Relay Word Bits
871
Table K.2 Relay Word Bit Definitions for the SEL-751 Relay
876
Table L.
893
Table L.1 Analog Quantities
894
Table M.1 IP Port Numbers
901
Date Code
911
Figure 4.80 Close Logic
913
Figure 4.98 Counter
913
Figure 8.42 Event History
914
Figure 8.43 Event Summary
914
Table 7.46 SUMMARY Command
914
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