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Pentium III
Intel Pentium III Manuals
Manuals and User Guides for Intel Pentium III. We have
3
Intel Pentium III manuals available for free PDF download: Specification, Design Manual, Design Manuallines
Intel Pentium III Design Manual (68 pages)
Processor with 512KB L2 Cache Dual Processor Platform
Brand:
Intel
| Category:
Computer Hardware
| Size: 0.73 MB
Table of Contents
Table of Contents
3
1 Design Guide Introduction
9
Audience
9
Related Documents
9
Conventions and Terminology
10
State of the Data
11
2 General Design Considerations
13
Nominal Board Stackup
13
Sample Board Stackup
13
Socket 370 Component Keepout
14
Socket 370 Volumetric Keepout
15
3 Processor Host Bus Design
17
Initial Timing Analysis
17
System Timing Equations
17
System Timing Terms
17
General Topology and Layout Guidelines
18
System Bus Timing Parameters
18
Sample CPU to CPU Flight Time Calculations
18
System Bus T-Topology
19
Trace Lengths for T Topology (Serverworks Chipset)
19
Component Values for T Topology
19
Terminator-Less T Topology
20
Terminator-Less System Bus T Topology
20
Wired-OR Signal Considerations
21
Trace Lengths for Terminator-Less T Topology (Serverworks Chipset)
21
Component Values for Terminator-Less T Topology
21
Wired-OR Termination Topology
22
Wired-OR Values
22
Simulation Methodology
23
Trace Routing
23
Layout Rules for AGTL Signals
23
Ground Reference
23
Reference Plane Splits
23
CPU Connector Breakout
23
Minimizing Crosstalk
24
Layout Rules for Non-AGTL (CMOS) Signals
24
Undershoot/Overshoot Requirements
25
Debug Port Routing Guidelines
25
Target System Implementation
25
Simple Terminations
26
System Signal Layout Guidelines
26
TCK Termination, DP System
27
3.10.1.1.2 JTAG Signal Layout Guidelines
27
Execution Signals Routing Guidelines
27
Prdyx# Signal Termination
28
RESET# Signal Termination
28
Debug Port Termination Requirement
29
Routing Guidelines
29
JTAG Signals TDI/TDO for Processor Only
30
TDO 3-Pin Jumper Bypass
31
4 Clocking
33
General Clocking Considerations
33
Single Ended Host Bus Clocking Routing
34
Host Bus Clock Connections
34
Single Ended Clocking Topology - CPU
35
Single Ended Clocking Topology - Chipset
35
Component Values for SE Clocking Topology - CPU
35
CLKREF Filter Implementation
36
Component Values for SE Clocking Topology - Chipset
36
Single-Ended Clocking BSEL[1:0] Implementation
37
Differential Host Bus Clocking Routing
37
Single Ended Clock BSEL Circuit
37
CLKREF Component Values
37
Differential Clocking Topology
38
Component Values for Differential Clocking
38
Differential Clocking BSEL[1:0] Implementation
39
Debug Port Host Clock Connection
39
Differential Clock BSEL Circuit
39
Clock Driver Decoupling and Power Delivery
40
Debug Port Differential Host Clock Implementation
40
5 Power
41
Terminology
41
Typical Power Delivery
41
Ideal Processor Power Supply Scheme
42
Power Distribution for a DP System Motherboard
42
Dual Processor Power Requirements
43
Voltage Tolerance
43
Detailed Power Distribution Model for System with VRM
43
VRM 8.5 Board Power Distribution Model
43
Multiple Voltages
44
Voltage Sequencing
44
Meeting Power Requirements
44
Supplying Voltage
44
Decoupling Technology and Transient Response
45
Recommendations
46
Bulk Capacitance Recommendations
46
Decoupling Guidelines
47
PGA370 Decoupling Capacitor Placement
47
VCC CORE High Frequency Capacitance Recommendations
47
Processor PLL Filter Recommendations
48
Processor PLL Filter
48
PLL Power Low Pass Filter Response
49
Thermals
51
THERMTRIP# Requirements
51
THERMTRIP# Erratum
51
THERMTRIP# Timing Requirements
51
Example Dual Processor THERMTRIP# Workaround Circuit
52
Processor Migration Considerations
53
Overview
53
Implement VRM 8.5
53
VRM 8.5 Voltage Range
53
Active Voltage Positioning
54
Voltage Range Comparison
54
VRM 8.5 Modules
55
Package Changes (FC-PGA2)
55
Active Voltage Positioning Operating Parameters
55
Pinout Changes
56
Package Comparisons
56
Pin Differences List
56
Electrical Keying Mechanism
57
Dual Processor Specific Pin Recommendations
58
Detect (Af36)
58
Reset2 (Aj3)
58
Key (Am2)
58
AGTL Bus Transition
58
Signalling Parameter Comparisons
58
Host Bus Layout Changes
59
Single Ended Clocking Support
59
VID & BSEL Signals
59
Power on Sequence
60
Signalling Changes
60
Legacy Clock Driver Support
60
SE Clocking Implementation
60
PICCLK Voltage Change
61
ITP Changes
61
Logic Analyzer Interface
61
System Design Checklist
63
Introduction
63
Design Checklist Summary
63
Host Interface AGTL Bus and AGTL Signals
63
AGTL Signals
63
CMOS (Non-AGTL) Signals
64
CMOS Signals
64
TAP/ITP Checklist for 370-Pin Socket Processors
65
TAP/ITP Signals
65
Miscellaneous Checklist for 370-Pin Socket Processors
66
Clock Signals
66
Miscellaneous Signals
66
Power Signals
67
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Intel Pentium III Specification (93 pages)
Specification Update
Brand:
Intel
| Category:
Computer Hardware
| Size: 0.64 MB
Table of Contents
III Processor
1
Table of Contents
3
Revision History
4
Preface
8
Related Documents
8
Codes Used in Summary Table
10
Summary Tables of Changes
10
Identification Information
20
Errata
39
Specification Changes
88
Specification Clarifications
89
Documentation Changes
93
Intel Pentium III Design Manuallines (33 pages)
Thermal Design Guidelines Processor in the FC-PGA2 Package
Brand:
Intel
| Category:
Computer Hardware
| Size: 0.44 MB
Table of Contents
Table of Contents
3
Revision History
5
1 Introduction
7
Document Scope
7
References
7
Definition of Terms
8
2 Importance of Thermal Management
9
3 FC-PGA2 Processor Packaging Technology
11
Figure 3-1. FC-PGA2 Mechanical Specifications
11
Table 3-1. FC-PGA2 Processor Package Dimensions
12
4 Thermal Specifications
13
Processor Case Temperature
13
5 Designing for Thermal Performance
15
Airflow Management
15
Figure 5-1. Example of Air Exchange through a Μatx PC Chassis
15
Recommended Fan Performance and Limitations
16
Bypass
16
Heatsink Solutions and Keep-In Areas
16
Thermal Interface Management
16
Bond Line Thickness
17
Interface Material Area
17
Interface Material Performance
17
Fans
17
Placement
18
Fan Direction
18
Size and Quantity
18
Venting
18
Area and Size
18
Vent Shape
19
6 Alternative Cooling Solutions
21
Ducting
21
Ducting Placement
21
System Components
21
Placement
21
Power
21
7 Thermal Metrology for FC-PGA2 Packaged Processors
23
Thermal Resistance
23
Figure 7-1. Processor-Heatsink Thermal Resistance Relationships
23
Equation 1. Case to Ambient Thermal Resistance
23
Thermal Solution Performance
24
Equation 2. Case to Ambient Thermal Resistance
24
Local-Ambient Temperature Measurement Guidelines
25
Figure 7-2. Local-Ambient Thermocouple Measurement Locations (Passive Heatsink)
25
Local-Ambient Temperature Measurement for a Passive Heatsink
25
Local-Ambient Temperature Measurement for an Active Heatsink
26
Processor Measurements for Thermal Specifications
26
Figure 7-3. Local-Ambient Thermocouple Measurement Locations (Active Heatsink)
26
Processor Case Temperature Measurements
27
Table 7-1. List of Items for Thermocouple Attach
27
Figure 7-4. Locating Geometric Center of Processor
28
Figure 7-5. Thermocouple Preparation
28
Figure 7-6. Thermocouple Adhesive Placement
29
Figure 7-7. Example of Machined Heatsink with Thermocouple Groove
30
Heatsink Preparation
30
About the High Power Application
31
Executing the High Power Application Software
31
Figure 7-8. Example of Dimensioning for Thermocouple Groove
31
Conclusion
33
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