Rf Matching Network Circuit - Motorola F2265A Owner's Manual

Theory of Operation
3.3.1.2 V and V Sensor
f r
3.3.1.2.1 General
Voltage representing the forward power (V
by vector addition of appropriately scaled samples of
the Total RF Current (I ) and Total RF Voltage (V
t
Voltage representing the reverse power (V
by vector subtraction of appropriately scaled samples of
I and V .
t t
3.3.1.2.2 Detailed Description
The current sample I is taken from pins 8 and 9 of
t
T101 and converted to voltage using resistor network
R187 through R190. The voltages over resistors
R187 + R188 and R189 + R190 have inverted phases.
Two capacitor networks (C192, C193, C205, C206 and
C194, C195, C209, C210) provide the V
Diodes CR104 and CR105 perform a vector subtraction
and addition (respectively) of the V
The V and V voltages are integrated over resistor and
f r
capacitor networks (R104, R111, C123 and R103,
R110, C122, respectively) to provide DC voltages
representing the absolute values of the V
vectors.
The V and V signals are passed to the Tuner Logic
f r
circuit for the VSWR calculation (see paragraph
3.3.3.2).
3.3.1.3 V g Sensor
As already mentioned, the V
on which the RF signal is located on the Smith Chart.
V is derived by vector subtraction of appropriately
g
scaled samples of I and V
t
Pins 8 and 9 of T101 provide the current sample (I
which is converted to voltage using resistor network
R187 and R188. A capacitor network (C199, C207,
C208) provides the V sample. Diode CR106 performs
t
a vector subtraction of the I
R107 and capacitor C124 perform integration on the V
vector to provide a DC voltage proportional to the
vector absolute value.
The integrated V signal is passed to the Tuner Logic
g
circuit for the G circle indication (see paragraph
3.3.3.2).
3-4
) is derived
f
t
) is derived
r
samples.
t
and I samples.
t t
and V
f
signal indicates G circle
g
signals.
t
from V . Resistor R102,
t t
3.3.1.4 Frequency Sample
Capacitors C200, C211 and C212 sample the RF signal
during the tuning process. Sampling is enabled for a
duration of 20 milliseconds under control for the Tuner
Logic circuit. The sample signal FREQ is passed to the
). Tuner Logic circuit.
During sampling, 12 Vdc is supplied to the cathode of
pin diode CR108 via R106 and L115 and keeps the
diode in the cut off state (the diode does not conduct).
When the sampling is completed the FREQ_SW signal
from the Tuner Logic circuit is applied to transistor
Q101. The transistor switches on and provides a DC
current path from CR108 diode's cathode to ground via
R191. Since the diodes' anode receives DC from the
Tuner Logic circuit via the FREQ line, the diode now
conducts and the RF signal on the FREQ line is shorted
to ground via CR108 and capacitor C134.
3.3.1.5 Vcc Voltage Supply
Voltage regulator U101 provides the +5 V Vcc to the
Tuner Logic circuit.
The DC power (typically 13.8 V) is received from the
radio via the RF input coaxial cable. This power is
interconnected to the 12 V internal power line via RF
r
choke L120.
3.3.1.6 Spark Gap
A 300 V spark gap (E101) protects the radio from high
voltage RF or spikes originating in the ATU.

3.3.2 RF MATCHING NETWORK CIRCUIT

Refer to Figure 3-2 for the RF Matching Network
Block Diagram.
3.3.2.1 Series Inductor
The network includes a variable series inductor which
)
t
enables clockwise movement along constant R circles
on the Smith Chart, until the G=1 circle is crossed
towards the inductance side.
The variable inductor is made up of 11 high-Q series
inductors, that can be switched in and out of the
g
network using relays connected to each inductor in
parallel (K101 - K111). In general, the inductors' values
increase in a binary order (except for the L101 and 102
that have identical values, so as to cover the range
between 0.08 µH and 75µH).