Sanyo LED-DP32242 Service Manual page 16

• 64MByte typical for most designs
• Power
• 1.1V core voltage, 1.8V memory I/F, 3.3V I/O
• Two Package Options
• 365-ball BGA, 23x23mm
• 256-pin LQFP with e-pad, 28x28mm
(*) Slight variation of support with QFP package
1.1. SupraHD 748 IC Description
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The SupraHD 748 is a member of the SupraHD
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developed by Zoran. This device is intended to be used in ATSC high-definition digital television
implementations. This device includes all of the functionality required to support the television
implementations shown in the following block diagrams.
Figure 2 shows a typical ATSC system implementation using the SupraHD
Figure 3 shows the detailed block diagram of the SupraHD
Figure 4 shows the video and audio input/output options of the SupraHD
1.2. SupraHD 748 Features
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The following sub-sections list the features of the SupraHD
unique to the BGA package are indicated with a "(BGA package)" designation while QFP
package features are indicated with "(QFP package)".
1.2.1. Embedded Processing Unit
• High performance CPU
• Integrated high-performance MIPS
• 32-bit MIPS32 enhanced architecture
• 8 K instruction cache, 8 K data cache, (2-way set associative)
• Programmable memory management unit
• Multiply/Divide unit
• Power-down mode (triggered by WAIT instruction)
• EJTAG debug support
• Fully production-tested software suite
• ATSC/NTSC DTV application with customizable OSD
• V-Chip for analog and digital channels
• PSIP parsing for channel map and EPG
• Analog and digital closed-captioning (EIA-608 and EIA-708)
2
2
4KEc™ CPU operating at 300MHz
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family of DTV system-on-chip (SoC)
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748.
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748 per category. Note that features
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18
748.
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748.
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