VESTEL 17MB15 Service Manual
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VESTEL 17MB15 Service Manual

VESTEL 17MB15 Service Manual

Vestel 27" tft tv service manual
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27" TFT TV
(17MB15)
SERVICE MANUAL

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  • Page 1 27” TFT TV (17MB15) SERVICE MANUAL...

  • Page 2: Table Of Contents

    TABLE OF CONTENTS INTRODUCTION ............................1 TUNER..............................1 IF PART (TDA9886) ..........................1 MULTI STANDARD SOUND PROCESSOR .................... 2 VIDEO SWITCH TEA6415 ........................2 AUDIO AMPLIFIER STAGE WITH TPA3002D2 ..................2 MICROCONTROLLER ..........................3 EEPROM 24C32............................3 CLASS AB STEREO HEADPHONE DRIVER TDA1308 ................. 3 SAW FILTERS............................
  • Page 3 General Description ....................... 15 11.13.1. Features ..........................15 11.13.2. Applications..........................15 11.13.3. Connection Diagrams ......................16 11.13.4. 11.14. LM317.............................. 16 General Description ....................... 16 11.14.1. Features ..........................16 11.14.2. Pin Description ........................16 11.14.3. 11.15. LM809.............................. 16 General Description ....................... 16 11.15.1.
  • Page 4 General Description ....................... 29 11.29.1. Features ..........................29 11.29.2. Pinning ............................ 30 11.29.3. 11.30. µPA672T............................31 General Description ....................... 31 11.30.1. Features ..........................31 11.30.2. Pin Connection ........................31 11.30.3. 11.31. VPC3230D............................31 General Description ....................... 31 11.31.1. Pin Connections and Short Descriptions ................32 11.31.2.

  • Page 5: Introduction

    1. INTRODUCTION 27” TFT TV is a progressive TV control system with built-in de-interlacer and scaler. It uses a 1366*768 panel with 16:9 aspect ratio. The TV is capable of operation in PAL, SECAM, NTSC (playback) colour standards and multiple transmission standards as B/G, D/K, I/I’, and L/L’ including German and NICAM stereo.

  • Page 6: Multi Standard Sound Processor

    acquisition help, Audio amplifier and mute time constant, I²C-bus transceivers and MAD (module address), Internal voltage stabilizer 4. MULTI STANDARD SOUND PROCESSOR The MSP34x1G family of single-chip Multistandard Sound Processors covers the sound processing of all analog TV-Standards worldwide, as well as the NICAM digital sound standards. The full TV sound processing, starting with analog sound IF signal-in, down to processed analog AF-out, is performed on a single chip.

  • Page 7: Microcontroller

    7. MICROCONTROLLER The Micronas SDA 55xx TV microcontroller is dedicated to 8 bit applications for TV control and provides dedicated graphic features designed for modern low class to mid range TV sets. The SDA 55xx provides also an integrated general purposefully 8051-compatible microcontroller with specific hardware features especially suitable in TV sets.

  • Page 8: Ic Descriptions

    Features • TV IF video filter with Nyquist slopes at 33.90 MHz and 38.90 MHz • Constant group delay Terminals Tinned CuFe alloy Pin configuration 1 Input 2 Input - ground 3 Chip carrier - ground 4 Output 5 Output 11.

  • Page 9: Tea6415C

    11.1. TEA6415C 11.1.1. General Description The main function of the IC is to switch 8 video input sources on 6 outputs. Each output can be switched on only one of each input. On each input an alignment of the lowest level of the signal is made (bottom of synch.

  • Page 10: 24Lc02

    11.2. 24LC02 11.2.1. Description The Microchip Technology Inc. 24AA02/24LC02B (24XX02*) is a 2 Kbit Electrically Erasable PROM. The device is organized as one block of 256 x 8-bit memory with a 2-wire serial interface. Low-voltage design permits operation down to 1.8V, with standby and active currents of only 1µA and 1mA, respectively.

  • Page 11: Tcet1102G Optocoupler

    11.3. TCET1102G Optocoupler 11.3.1. General Description The TCET110. / TCET2100/ TCET4100 consist of a phototransistor optically coupled to a gallium arsenide infrared-emitting diode in a 4-lead up to 16-lead plastic dual inline package. The elements are mounted on one lead frame using a coplanar technique, providing a fixed distance between input and output for highest safety requirements.

  • Page 12: Svp-Ex 52

    11.3.3. Applications Circuits for safe protective separation against electrical shock according to safety class II (reinforced isolation): For appl. class I – IV at mains voltage ≤300 V For appl. class I – III at mains voltage ≤600 V According to VDE 0884, table 2, suitable for: Switch-mode power supplies, line receiver, computer peripheral interface, microprocessor system interface.

  • Page 13: Pinning

    10,000,000 Erase/Write cycles guaranteed for High Endurance Block 10,000,000 E/W cycles guaranteed for Standard Endurance Block • 8 byte page, or byte modes available • page x 8 line input cache (64 bytes) for fast write loads • Schmitt trigger, filtered inputs for noise suppression •...

  • Page 14: 74Lvc14A

    For normal data transfer SDA is allowed to change only during SCL low. Changes during SCL high are reserved for indicating the START and STOP conditions. SCL Serial Clock This input is used to synchronize the data transfer from and to the device. 11.7.

  • Page 15: Tea6420

    11.8. TEA6420 11.8.1. Features • 5 Stereo Inputs • 4 Stereo Outputs • Gain Control 0/2/4/6dB/Mute for each Output • Cascadable (2 different addresses) • Serial Bus Controlled • Very low Noise • Very low Distortion 11.8.2. Description The TEA6420 switches 5 stereo audio inputs on4stereo outputs. All the switching possibilities are changed through the I C bus.

  • Page 16: Pin Descriptions

    11.9.3. Pin Descriptions 11.10. GAL16LV8 11.10.1. Description The GAL16LV8D, at 3.5 ns maximum propagation delay time, provides the highest speed performance available in the PLD market. The GAL16LV8C can interface with both 3.3V and 5Vsignal levels. The GAL16LV8 is manufactured using Lattice Semiconductor's advanced 3.3V E CMOS process, which combines CMOS with Electrically Erasable (E ) floating gate technology.

  • Page 17: Pin Connections

    • PRELOAD AND POWER-ON RESET OF ALL REGISTERS - 100% Functional Testability • APPLICATIONS INCLUDE: - Glue Logic for 3.3V Systems - DMA Control - State Machine Control - High Speed Graphics Processing - Standard Logic Speed Upgrade • ELECTRONIC SIGNATURE FOR IDENTIFICATION •...

  • Page 18: Pin Description

    11.11.3. Pin Description 11.12. L6562 11.12.1. Features • TRANSITION-MODE CONTROL OF PFC PRE-REGULATORS • PROPRIETARY MULTIPLIER DESIGN FOR MINIMUM THD OF AC INPUT CURRENT • VERY PRECISE ADJUSTABLE OUTPUT OVERVOLTAGE PROTECTION • ULTRA-LOW (≤70µA) START-UP CURRENT • LOW (≤4 mA) QUIESCENT CURRENT •...

  • Page 19: Pin Connections And Descriptions

    11.12.3. Pin Connections and Descriptions 11.13. LM1117 11.13.1. General Description The LM1117 is a series of low dropout voltage regulators with a dropout of 1.2V at 800mA of load current. It has the same pin-out as National Semiconductor’s industry standard LM317. The LM1117 is available in an adjustable version, which can set the output voltage from 1.25V to 13.8V with only two external resistors.

  • Page 20: Connection Diagrams

    11.13.4. Connection Diagrams 11.14. LM317 11.14.1. General Description This monolithic integrated circuit is an adjustable 3-terminal positive voltage regulator designed to supply more than 1.5A of load current with an output voltage adjustable over a 1.2 to 37V. It employs internal current limiting, thermal shut-down and safe area compensation.

  • Page 21: Pinning

    • Guaranteed RESET Output valid for VCC≥1V • Low Supply Current, 15µAtyp • Power supply transient immunity 11.15.3. Pinning 11.16. MSP34X1G Multistandard Sound Processor Family 11.16.1. Introduction The MSP 34x1G family of single-chip Multistandard Sound Processors covers the sound processing of all analog TV-Standards worldwide, as well as the NICAM digital sound standards.

  • Page 22: Features

    Source Select S bus interface consists of five pins: 1. I2S_DA_IN1, I2S_DA_IN2: For input, four channels (two channels per line, 2*16 bits) per sampling cycle (32 kHz) are transmitted. 2. I2S_DA_OUT: For output, two channels (2*16 bits) per sampling cycle (32 kHz) are transmitted. 3.
  • Page 23 Connection Pin No. Pin Name Type Short Description (if not used) PLCC PSDIP PSDIP PQFP PLQFP 68-pin 64-pin 52-pin 80-pin 64-pin ADR_WS ADR word strobe Not connected ADR_DA ADR Data Output I2S_DA_IN1 S1 data input I2S_DA_OUT S data output I2S_WS IN/OUT S word strobe I2S_CL...

  • Page 24: M29W040B

    Not connected DACM_L Loudspeaker out, left DACM_R Loudspeaker out, right VREF2 Reference ground 2 DACA_L Headphone out, left DACA_R Headphone out, right Not connected Not connected RESETQ Power-on-reset Not connected Not connected Not connected I2S_DA_IN2 S2-data input DVSS Digital ground DVSS Digital ground DVSS...

  • Page 25: Pin Descriptions

    11.17.3. Pin Descriptions 11.18. MC33202 11.18.1. General Description The MC33201/2/4 family of operational amplifiers provide rail−to−rail operation on both the input and output. The inputs can be driven as high as 200mV beyond the supply rails without phase reversal on the outputs, and the output can swing within 50 mV of each rail.

  • Page 26: Pcf8574

    11.19. PCF8574 11.19.1. General Description The PCF8574 is a silicon CMOS circuit. It provides general purpose remote I/O expansion for most microcontroller families via the two-line bidirectional bus (I C).The device consists of an 8-bit quasi- bidirectional port and an I C-bus interface.

  • Page 27: Pi5V330

    11.20. PI5V330 11.20.1. General Description The PI5V330 is well suited for video applications when switching composite or RGB analogue. A picture-in-picture application will be described in this brief. The pixel-rate creates video overlays so two or more pictures can be viewed at the same time. An inexpensive NTSC titler can be implemented by superimposing the output of a character generator on a standard composite video background.

  • Page 28: Features

    receivers use the latest generation of PanelLink TMDS core technology. These PanelLink cores pass all HDMI compliancy tests. 11.22.2. Features • HDMI 1.0 and DVI 1.0 compliant receiver • Integrated PanelLink core supports DTV resolutions (480i/576i/480p/576p/720p/1080i) • Digital video interface supports video processors: o 24-bit RGB 4:4:4 o 24-bit YCbCr 4:4:4 o 16/20/24-bit YCbCr 4:2:2...

  • Page 29: Pin Connections And Descriptions

    11.23.3. Pin Connections and Descriptions 11.24. SN74CB3Q3305 11.24.1. General Description The SN74CB3Q3305 is a high-bandwidth FET bus switch utilizing a charge pump to elevate the gate voltage of the pass transistor, providing a low and flat ON-state resistance (r ). The low and flat ON- state resistance allows for minimal propagation delay and supports rail-to-rail switching on the data input/output (I/O) ports.

  • Page 30: Pin Connections

    − 1000-V Charged-Device Model (C101) • Supports Both Digital and Analog Applications: USB Interface, Differential Signal Interface, Bus Isolation, Low-Distortion Signal Gating 11.24.3. Pin Connections 11.25. ST24LC21 11.25.1. Description The ST24LC21 is a 1K bit electrically erasable programmable memory (EEPROM), organized by 8 bits. This device can operate in two modes: Transmit Only mode and I C bidirectional mode.

  • Page 31: Lm2576

    11.26. LM2576 11.26.1. General Description The LM2576 series of regulators are monolithic integrated circuits ideally suited for easy and convenient design of a step–down switching regulator (buck converter). All circuits of this series are capable of driving a 3.0 A load with excellent line and load regulation. These devices are available in fixed output voltages of 3.3 V, 5.0 V, 12 V, 15 V, and an adjustable output version.

  • Page 32: Pinning

    • Short-circuit resistant • High performance • high signal-to-noise ratio • High slew rate • Low distortion • Large output voltage swing. 11.27.3. Pinning SYMBOL DESCRIPTION PIN VALUE OUTA Output A (Voltage swing) Min : 0.75V, Max : 4.25V INA(neg) Inverting input A Vo(clip) : Min : 1400mVrms INA(pos)

  • Page 33: Tpa3002D2

    DEEM de-emphasis output for capacitor AF decoupling input for capacitor DGND digital ground audio output tuner AGC TakeOver Point (TOP) C-bus data input/output C-bus clock input SIOMA sound intercarrier output and MAD select n.c. not connected TAGC tuner AGC output 4 MHz crystal or reference input VAGC VIF-AGC for capacitor;...

  • Page 34: Pinning

    11.29.3. Pinning Terminal Functions DESCRIPTION TERMINAL NAME AGND 26, 30 Analog ground for digital/analog cells in core High-voltage analog power supply (8.5 V to 14 V) 5-V Regulated output capable of 100-mA output 5-V Reference output—provided for connection to adjacent VREF terminal. BSLN Bootstrap I/O for left channel, negative high-side FET BSLP...

  • Page 35: Μpa672T

    RINP Positive differential audio input for right channel RINN Negative differential audio input for right channel ROSC Current setting resistor for ramp generator. Nominally equal to 1/8*VCC ROUTN 44, 45 Class-D 1/2-H-bridge negative output for right channel ROUTP 40, 41 Class-D 1/2-H-bridge positive output for right channel Shutdown signal for IC (low = shutdown, high = operational).

  • Page 36: Pin Connections And Short Descriptions

    • multi-standard sync processing • linear horizontal scaling (0.25 ... 4), as well as non-linear horizontal scaling ‘Panorama-vision’ • PAL+ preprocessing • line-locked clock, data and sync, or 656-output interface • peaking, contrast, brightness, color saturation and tint for RGB/ YC and CVBS/ S-VHS •...

  • Page 37: Service Menu Settings

    Picture Bus Chroma Picture Bus Chroma Picture Bus Chroma SUPPLYD Supply Voltage, Chroma Output Circuitry SUPC SUPPLYD Ground, Chroma Output Circuitry Picture Bus Chroma Picture Bus Chroma Picture Bus Chroma Picture Bus Chroma (LSB) SUPPLYD Ground Sync Pad Circuitry SUPPLYD Supply Voltage, Sync Pad Circuitry SUPSY INTLC...

  • Page 38: Sound1

    • Sharpness => Slider Bar. Changing value between 0 to 31. • Colour => Slider Bar. Changing value between 0 to 99. • => Slider Bar. Changing value between 0 to 31. • => Slider Bar. Changing value between 0 to 31. •...

  • Page 39: Tv Norm

    • Factory Reset => OK to activate. When OK is pressed on this item, factory defaults loaded. • Enter Flash Mode => Before uploading SW this mode must be selected. • Reset Eeprom => Initialize default settings 12.5. TV Norm •...

  • Page 40: Main Board

    GENERAL BLOCK DIAGRAM 13. BLOCK DIAGRAM MAIN BOARD AUDIO AMPL. BOARD MAIN_L, MAIN_R, AUDIO AUDIO DECODING AUDIO DECODING AUDIO MSP3411G AMPLIFIER MSP3411G AMPLIFIER MICRONAS D-CLASS MICRONAS D-CLASS IDTV,SVHS,MMC (RGB),PC IN SVP-EX 59 SVP-EX 59 LVDS OUT 8-BIT YUV VPC3230D VPC3230D VIDEO PROCESSOR VIDEO PROCESSOR PIP PICTURE...
  • Page 41 C2023 Mute is active high L2018 R2203 PC_AUDIO_L_IN 100R 13 LOUT2 ROUT3 L219 AUDIO_L2 C254 R2204 L2019 L218 VESTEL ELECTRONICS VCC5V_FILTERED 14 ROUT2 LOUT3 R1115 100R BLM21B201S TV R&D GROUP 100R AUDIO_R2 C251 TFT TV 17MB15E-5 TFT TV Tuner/IF/Audio M.KURSAT VER.
  • Page 42 100R R219 R208 PC STAND-BY PANEL_VCC_ON/OFF R209 PGAGND R210 PL200 PORT EXPANDER D-SUB 15 PC INPUT & DDC CIRDUIT VESTEL ELECTRONICS TV R&D GROUP TFT TV 17MB15E-5 TFT TV IN/OUT M.KURSAT VER. E0 DATE SARIARSLAN Sheet 02 21/4/2004 VESTEL R&D...
  • Page 43 S303 VCCD2_3V3 VCCD_3V3 DVS_2EX IC316 VCCD2_3V3 RGB_SW3 C362 R2030 VCC_5V L2010 C2046 SCL SDA STBY_5V SC1_R R2032 BLM21B201S VCC_5V L308 SC2_R SC1_FB R2031 VCC_5V BLM21B201S 220n RGB_R_VPC C2047 C2048 PI5V330_SOIC SC2_FB VCCD2_3V3 SC1_G FB_VPC C318 100n 20.25MHz SC2_G SC1_B C340 RGB_G_VPC SC2_B X300...
  • Page 44 150R 600mA lik ferit 26R_100MHZ_1.5A R440 L400 SC2_FB_SVP 150R 600mA lik ferit PAVDD L408 VDDH VCCA_3V3 L402 VL1_8 VCCA_3V3 S442 Q401 AVDD3_AVSP2 BC848B VESTEL ELECTRONICS S445 TV R&D GROUP TFT TV 17MB15E-5 TFT VIDEO DECODER VER E0 DATE M.KURSAT SHEET4 21/4/2004 SARIARSLAN...
  • Page 45 VESTEL ELEKTRONICS TV R&D GROUP 17MB15E-5 TV DDR RAM TFT TV DATE MUHAMMET KURSAT VER E0 SHEET 5 21/4/2004 SARIARSLAN R500 MD[27] 100n C505 MD[26] C518 MD[25] R512 100u MD[24] C502 R501 MD[23] C525 MD[22] C516 MD[21] C524 100u MD[20]...
  • Page 46 UART SOCKET FOR IDTV S412 R412 Q400 BC337 PL308 S629 D600 UP_RXD PL604 S414 S628 BZT55C5V1 UP_TXD VESTEL ELECTRONICS PWM2 TV R&D GROUP LEVEL SHIFTER LOC_KEY STBY_3V3 VCCA_3V3 S627 TFT TV 17MB15E-5 TFT TV MCU INTERFACE UP_IRQ PL606 VER. E0 DATE M.KURSAT...
  • Page 47 S807 close to C2065 HDMI_CEC S801 pin8 HDMI_3V3 VCC_SII 100n S802 GND_SII D2021 R2071 P1_CBL5V P1_EVCC5 S803 S806 VESTEL ELECTRONICS HDMI_3V3 0VCC_SII 1N5817 17MB15E-5 TV R&D GROUP S804 PART AUTHOR DATE Sheet OGND_SII METEHAN 30.10.2004 HDMI/DAC 8 of 9 ALTUNLU...
  • Page 48 PL903 L918 VCC_5V VCC_12V VESTEL ELECTRONICS TV R&D GROUP S908 PANEL_VCC1 VCCA_3V3 L917 S909 TFT TV 17MB15E-5 TFT TV POWER SUPPLY VCCA_3V3 STBY_3V3 S910 LG_1/IRQPDP STBY_5V VER. E0 DATE M.KURSAT PDP_GO1/BL_ON_OFF Sheet 09 21/4/2004 SARIARSLAN L906 AC_INFO SUPPLY L909 STBY_5V...
  • Page 49 FD15" S638" Q1015" C1198" PL104" L1002" PL900" S642" C" IC903" S639" R1031" C444" R1122" S641" R251" S645" Q402" C1042" R1121" R1022" S640" C1045" R1038" A" B" C1037" PL904" D914" PL901" R1025" L900" R250" L1018" S2013" C1152" L902" D900" L901" D1003" L903"...
  • Page 50 FD6" S113" S600" R6035" R6036" S651" S648" R1128" S903" R271" R436" S904" C1204" S652" R901" C1203" Q6009" L408" R900" C1122" C1120" S905" R6038" C415" S911" R1000" R433" C1128" C414" S634" L407" C1084" C1177" R270" R1105" R1078" S415" R420" R1028" C1170" R104"...
  • Page 56 BZT55C10 BZT55C10 BZT55C10 BZT55C10 BZT55C10 BZT55C10 BZT55C10 100p C100 C101 C102 C103 C104 C108 C109 C110 100p 100p 100p 100p 100p C106 C107 LINE_OUT_SUB LINE_OUT_L LINE_OUT_R FPD TV DESIGN GROUP 17FAV15-1 VESTEL Author ILHAN TAYGURT 20/05/2005 Sheet 01 of 01...
  • Page 57 15V_AUD 15V supply voltage ait 100n decoupling capasiteler pinlere mumkun oldugunca yakin olacak R772 R768 vcc 5v 100n VESTEL ELECTRONICS S732 C825 TV R&D GROUP Q710 BC848B MUTE 18AMP05-1 D-CLASS AMPLIFIER VER.

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