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V DMA BLOCK: IDMA (Intelligent DMA)
FIDMA: IDMA interrupt factor flag (D4) / DMA interrupt factor flag register (0x40281)
Indicate the occurrence status of an IDMA interrupt request.
When read
Read "1": Interrupt factor occurred
Read "0": No interrupt factor occurred
When written using reset-only method (default)
Write "1": Interrupt factor flag is reset
Write "0": Invalid
When written using the read/write method
Write "1": Interrupt factor flag is set
Write "0": Interrupt factor flag is reset
This flag is set to "1" when one DMA transfer initiated by a software trigger or subsequent link is completed and
the transfer counter is decremented to 0. However, this requires as a precondition that interrupts be enabled in
control information (DINTEN = "1").
At this time, an interrupt to the CPU is generated if the following conditions are met:
1. The corresponding interrupt enable register bit is set to "1".
2. No interrupt request of higher priority is generated.
3. The IE bit of the PSR is set to "1" (interrupt enable).
4. The corresponding interrupt priority register is set to a level higher than the CPU's interrupt level (IL).
In order for the next interrupt to be accepted after interrupt generation, the interrupt factor flag must be reset and
the PSR must be set up again (by setting the IL below the level indicated by the interrupt priority register and
setting the IE bit to "1" or executing a reti instruction).
The interrupt factor flag can only be reset by a write instruction in the software application. If the PSR is set up
again to accept interrupts (or the reti instruction is executed) without resetting the interrupt factor flag, the same
interrupt may occur again. Note also that the value to be written to reset the flag is "1" when using the reset-only
method (RSTONLY = "1") and "0" when using the read/write method (RSTONLY = "0"). Be careful not to
confuse these two cases.
This flag becomes indeterminate when initially reset, so be sure to reset it in the software application.
B-V-3-16
EPSON
S1C33L03 FUNCTION PART
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