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“Important Alert Items” in this manual. Keep this manual handy, and keep it carefully. FUJITSU makes every effort to prevent users and bystanders from being injured or from suffering damage to their property. Use the product according to this manual.
Revision History (1/1) Revised section (*1) Edition Date Details (Added/Deleted/Altered) 2006-08-20 *1 Section(s) with asterisk (*) refer to the previous edition when those were deleted. C141-E249...
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This manual describes MHW2120BS, MHW2100BS, MHW2080BS, MHW2060BS, MHW2040BS model of the MHW Series, 2.5-inch hard disk drives. These drives have a built-in controller that is compatible with the Serial- ATA interface. This manual describes the specifications and functions of the drives and explains in detail how to incorporate the drives into user systems.
Preface Conventions for Alert Messages This manual uses the following conventions to show the alert messages. An alert message consists of an alert signal and alert statements. The alert signal consists of an alert symbol and a signal word or just a signal word. The following are the alert signals and their meanings: In the text, the alert signal is centered, followed below by the indented message.
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“Disk drive defects” refers to defects that involve adjustment, repair, or replacement. Fujitsu is not liable for any other disk drive defects, such as those caused by user misoperation or mishandling, inappropriate operating environments, defects in the power supply or cable, problems of the host system, or other causes outside the disk drive.
Important Alert Items Important Alert Messages The important alert messages in this manual are as follows: A hazardous situation could result in minor or moderate personal injury if the user does not perform the procedure correctly. Also, damage to the product or other property, may occur if the user does not perform the procedure correctly.
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Contents 6.5.1 Cache operation...6-20 Glossary ... GL-1 Acronyms and Abbreviations ...AB-1 Index ... IN-1 C141-E249...
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Figures Figure 1.1 Permissible range of +5V rise slope... 1-6 Figure 1.2 The example of negative voltage waveform at +5 V when power is turned off ... 1-7 Figure 1.3 Current fluctuation (Typ.) at +5 V when power is turned on... 1-9 Figure 2.1 Disk drive outerview ...
CHAPTER 1 Device Overview Features Device Specifications Power Requirements Environmental Specifications Acoustic Noise Shock and Vibration Reliability Error Rate Media Defects 1.10 Load/Unload Function 1.11 Advanced Power Management (APM) 1.12 Interface Power Management (IPM) Overview and features are described in this chapter, and specifications and power requirement are described.
30 recording zone technology. The disk drive has a formatted capacity of 120 GB (MHW2120BS), 100 GB (MHW2100BS), 80 GB (MHW2080BS), 60 GB (MHW2060BS) and 40 GB (MHW2040BS) respectively. (4) High-speed Transfer rate The disk drive (the MHW2xxxBS Series) has an internal data rate up to 61.3 MB/s.
(3) Low noise and vibration In Ready status (while the device is waiting for any commands), the Sound Power level of the disk drives in idle mode is 2.0B [MHW2040BS, MHW2060BS] / 2.4B [MHW2080BS, MHW2100BS, MHW2120BS]. The Sound Pressure level is 22dB [MHW2040BS, MHW2060BS] / 28dB [MHW2080BS, MHW2100BS, MHW2120BS], as measured 0.3 m from the drive in Idle mode.
Device Overview 1.2 Device Specifications 1.2.1 Specifications summary Table 1.1 shows the specifications of the disk drives. Table 1.1 Specifications (1/2) MHW2120BS MHW2100BS MHW2080BS MHW2060BS MHW2040BS Format Capacity (*1, *2) Number of Sectors (User) 234,441,648 Bytes per Sector Rotational Speed...
Table 1.1 Specifications (2/2) Model Capacity 2120BS 8.45 GB 2100BS 8.45 GB 2080BS 8.45 GB 2060BS 8.45 GB 2040BS 8.45 GB 1.2.2 Model and product number Table 1.2 lists the model names and product numbers of the disk drive. The model name does not necessarily correspond to the product number as listed in Table 1.2 since some models have been customized and have specifications that are different from those for the standard model.
Device Overview 1.3 Power Requirements (1) Input Voltage • + 5 V ± 5 % • It is unnecessary for this drive to supply +3.3 V and +12 V power supplies. (2) Ripple Maximum Frequency (3) Slope of an input voltage at rise The following figure shows the restriction of the slope which is +5 V input voltage at rise.
(4) A negative voltage like the bottom figure isn't to occur at +5 V when power is turned off and, a thing with no ringing. Permissible level: − 0.2 V Figure 1.2 The example of negative voltage waveform at +5 V C141-E249 Time [ms] when power is turned off...
0.0050 W/GB (rank E / MHW2120BS) 0.0060 W/GB (rank E / MHW2100BS) — 0.0075 W/GB (rank E / MHW2080BS) 0.0100 W/GB (rank D / MHW2060BS) 0.0150 W/GB (rank D / MHW2040BS) 5.0 W 0.60 W 1.9 W 2.1 W 0.13 W 0.13 W...
(6) Current fluctuation (Typ.) at +5 V when power is turned on Figure 1.3 Current fluctuation (Typ.) at +5 V when power is turned on 1.4 Environmental Specifications Table 1.4 lists the environmental specifications. Table 1.4 Environmental specifications Item Temperature •...
1.7 Reliability (1) Mean time between failures (MTBF) Conditions of 500,000 h Conditions of 300,000 h MTBF is defined as follows: Total operation time in all fields MTBF= number of device failure in all fields (*1) *1 “Disk drive defects” refers to defects that involve repair, readjustment, or replacement.
Device Overview 1.8 Error Rate Known defects, for which alternative blocks can be assigned, are not included in the error rate count below. It is assumed that the data blocks to be accessed are evenly distributed on the disk media. (1) Unrecoverable read error Read errors that cannot be recovered by maximum read retries of drive without user’s retry and ECC corrections shall occur no more than 1 time when reading...
Emergency Unload other than Unload is performed when the power is shut down while the heads are still loaded on the disk. The product supports the Emergency Unload a minimum of 20,000 times. When the power is shut down, the controlled Unload cannot be executed. Therefore, the number of Emergency other than Unload is specified.
Device Overview Low Power Idle: Standby: In APM Mode-1, which is the APM default mode, the operation status shifts till it finally reaches "Low Power Idle." Table 1.7 Advanced Power Management APM Mode Mode-0 Mode-1 Mode-2 When the maximum time that the HDD is waiting for commands has been exceeded: Mode-0: Mode shifts from Active condition to Active Idle in 3-4 seconds, and to Low Power Idle in 15 minutes.
1.12 Interface Power Management (IPM) 1.12.1 Host-initiated interface power management (HIPM) When the disk drive is waiting for commands, it can enter one of three IPM modes as requested by the host. The three IPM modes are: 1) Partial mode: 2) Slumber mode: PMREQ_S is sent when the host requests the Slumber mode.
Device Overview Table 1.8 Interface power management IPM Mode I/F power state Active Active State Partial Partial State Slumber Slumber State 1-16 Return time to active I/F condition − Active 5 to 10 µs maximum Power Down 5 to 10 ms maximum Power Down C141-E249...
CHAPTER 2 Device Configuration Device Configuration System Configuration This chapter describes the internal configurations of the hard disk drives and the configuration of the systems in which they operate. C141-E249...
Device Configuration 2.1 Device Configuration Figure 2.1 shows the disk drive. The disk drive consists of a disk enclosure (DE), read/write preamplifier, and controller PCA. The disk enclosure contains the disk media, heads, spindle motor, actuator, and a circulating air filter. Figure 2.1 Disk drive outerview (1) Disk The outer diameter of the disk is 65 mm.
(6) Read/write circuit The read/write circuit uses a LSI chip for the read/write preamplifier. It improves data reliability by preventing errors caused by external noise. (7) Controller circuit The controller circuit supports Serial-ATA interface, and it realized a high performance by integration into LSI. 2.2 System Configuration 2.2.1 SATA interface Figure 2.2 shows the SATA interface system configuration.
CHAPTER 3 Installation Conditions Dimensions Mounting Connections with Host System This chapter gives the external dimensions, installation conditions, surface temperature conditions, cable connections, and switch settings of the hard disk drives. C141-E249...
Installation Conditions 3.1 Dimensions Figure 3.1 illustrates the dimensions of the disk drive. All dimensions are in mm. The PCA and connectors are not included in these dimensions. Dimension from the center of the user tap to the base of the connector pins Length of the connector pins Dimension from the outer edge of the user tap to the center of the connector pins...
3.2 Mounting For information on mounting, see the "FUJITSU 2.5-INCH HDD INTEGRATION GUIDANCE (C141-E144)." (1) Orientation The disk drives can be mounted in any direction. (2) Frame The MR head bias of the HDD disk enclosure (DE) is zero. The mounting frame is connected to Signal Ground (SG).
Installation Conditions (3) Limitation of mounting Note) These dimensions are recommended values; if it is not possible to satisfy them, contact us. Bottom surface mounting Frame of system cabinet 3.0 or less Details of A Figure 3.2 Mounting frame structure Side surface mounting Frame of system...
3.2 Mounting IMPORTANT Because of breather hole mounted to the HDD, do not allow this to close during mounting. Locating of breather hole is shown as Figure 3.3. For breather hole of Figure 3.3, at least, do not allow its around φ 3 to block.
Installation Conditions (4) Ambient temperature The temperature conditions for a disk drive mounted in a cabinet refer to the ambient temperature at a point 3 cm from the disk drive. The ambient temperature must satisfy the temperature conditions described in Section 1.4, and the airflow must be considered to prevent the DE surface cover temperature from exceeding 60 °C.
(5) Service area Figure 3.5 shows how the drive must be accessed (service areas) during and after installation. Mounting screw hole Cable connection Data corruption: Avoid mounting the disk drive near strong magnetic sources such as loud speakers. Ensure that the disk drive is not affected by external magnetic fields.
Installation Conditions General notes Wrist strap Use the Wrist strap. Do not hit HDD each other. Do not place HDD vertically to avoid falling down. Figure 3.6 Handling cautions Installation Please use the driver of a low impact when you use an electric driver. HDD is occasionally damaged by the impact of the driver.
3.3 Connections with Host System 3.3.1 Device connector The disk drive has the SATA interface connectors listed below for connecting external devices. Figure 3.7 shows the locations of these connectors and terminals. SATA interface and power connectors Figure 3.7 Connector locations C141-E249 3.3 Connections with Host System...
Installation Conditions 3.3.2 Signal segment and power supply segment Figure 3.8 shows each segment of the SATA interface connector and pin numbers. Power supply segment P1 pins in the power supply segment Figure 3.8 Power supply pins (CN1) 3.3.3 Connector specifications for host system Table 3.2 lists the recommended specifications for the host interface connectors.
3.3.4 SATA interface cable connection The cable that connects the disk drive to the host system must be compliant with the Serial ATA 1.0a specification. 3.3.5 Note about SATA interface cable connection Take note of the following precaution about plugging a SATA interface cable into the SATA interface connector of the disk drive and plugging the connector into a host receptacle: When plugging together the disk drive SATA interface connector...
CHAPTER 4 Theory of Device Operation Outline Subassemblies Circuit Configuration Power-on Sequence Self-calibration Read/write Circuit Servo Control This chapter explains basic design concepts of the disk drive. Also, this chapter explains subassemblies of the disk drive, each sequence, servo control, and electrical circuit blocks.
Theory of Device Operation 4.1 Outline This chapter consists of two parts. First part (Section 4.2) explains mechanical assemblies of the disk drive. Second part (Sections 4.3 through 4.7) explains a servo information recorded in the disk drive and drive control method. 4.2 Subassemblies The disk drive consists of a disk enclosure (DE) and printed circuit assembly (PCA).
4.2.4 Air filter There are two types of air filters: a breather filter and a circulation filter. The breather filter makes an air in and out of the DE to prevent unnecessary pressure around the spindle when the disk starts or stops rotating. When disk drives are transported under conditions where the air pressure changes a lot, filtered air is circulated in the DE.
Theory of Device Operation (4) Controller circuit Major functions are listed below. Serial-ATA interface control and data transfer control • Data buffer management • Sector format control • Defect management • ECC control • Error recovery and self-diagnosis • S-DRAM 3.3V Generator Circuit...
4.3 Circuit Configuration Serial ATA I/F MCU & HDC & RDC Data Buffer SDRAM Shock Sensor Crystal Thermistor SP Motor R/W Pre-Amp HEAD Media Figure 4.2 Circuit configuration C141-E249...
Theory of Device Operation 4.4 Power-on Sequence Figure 4.3 describes the operation sequence of the disk drive at power-on. The outline is described below. a) After the power is turned on, the disk drive initializes its SATA interface block. b) The disk drive executes the MPU bus test, internal register read/write test, and work RAM read/write test.
Power-on Start SATA I/F Initialization Self-diagnosis 1 - MPU bus test - Internal register write/read test - Work RAM write/read test The spindle motor starts. Self-diagnosis 2 - Data buffer write/read test Confirming spindle motor speed Load the head assembly Figure 4.3 Power-on operation sequence C141-E249 4.4 Power-on Sequence...
Theory of Device Operation 4.5 Self-calibration The disk drive occasionally performs self-calibration in order to sense and calibrate mechanical external forces on the actuator, and VCM torque. This enables precise seek and read/write operations. 4.5.1 Self-calibration contents (1) Sensing and compensating for external forces The actuator suffers from torque due to the FPC forces and winds accompanying disk revolution.
To compensate torque constant value change depending on cylinder, whole cylinders from most inner to most outer cylinder are divided into 13 partitions at calibration in the factory, and the compensation data is measured for representative cylinder of each partition. This measured value is stored in the SA area.
Theory of Device Operation 4.6 Read/write Circuit The read/write circuit consists of the read/write preamplifier (PreAMP), the write circuit, the read circuit, and the time base generator in the read channel (RDC) block which is integrated into LSI. Figure 4.4 is a block diagram of the read/write circuit.
4.6.3 Read circuit The head read signal from the PreAMP is regulated by the automatic gain control (AGC) circuit. Then the output is converted into the sampled read data pulse by the programmable filter circuit and the flash digitizer circuit. This signal is converted into the read data by the decorder circuit based on the read data maximum-likelihood-detected by the Viterbi detection circuit.
Theory of Device Operation (3) FIR circuit This circuit is 10-tap sampled analog transversal filter circuit that equalizes the head read signal to the Modified Extended Partial Response (MEEPR) waveform. (4) A/D converter circuit This circuit changes Sampled Read Data Pulse from the FIR circuit into Digital Read Data.
4.7 Servo Control The actuator motor and the spindle motor are submitted to servo control. The actuator motor is controlled for moving and positioning the head to the track containing the desired data. To turn the disk at a constant velocity, the actuator motor is controlled according to the servo data that is written on the data side beforehand.
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Theory of Device Operation (1) Microprocessor unit (MPU) The MPU executes startup of the spindle motor, movement to the reference cylinder, seek to the specified cylinder, and calibration operations. The main internal operations of the MPU are shown below. Spindle motor start Starts the spindle motor and accelerates it to normal speed when power is applied.
(6) Driver circuit The driver circuit is a power amplitude circuit that receives signals from the spindle motor control circuit and feeds currents to the spindle motor. (7) VCM current sense resistor (CSR) This resistor controls current at the power amplifier by converting the VCM current into voltage and feeding back.
4.7.3 Servo frame format As the servo information, the IDD uses the phase signal servo generated from the gray code and servo EVEN and ODD. This servo information is used for positioning operation of radius direction and position detection of circumstance direction.
Theory of Device Operation 4.7.4 Actuator motor control The voice coil motor (VCM) is controlled by feeding back the servo data recorded on the data surface. The MPU fetches the position sense data on the servo frame at a constant interval of sampling time, executes calculation, and updates the VCM drive current.
Hall-less three-phase twelve-pole motor is used for the spindle motor, and the PWM type current control circuit is used as the spindle motor driver (called SVC hereafter). The firmware operates on the MPU manufactured by Fujitsu. The spindle motor is controlled by sending several signals including the serial data from the MPU to the SVC.
CHAPTER 5 Interface Physical Interface Logical Interface Host Commands Command Protocol Power-on and COMRESET This chapter gives details about the interface, and the interface commands and timings. C141-E249...
Interface 5.1 Physical Interface 5.1.1 Interface signals Figure 5.1 shows the interface signals. TX data TX− RX data Host analog front RX− ComWake ComInit Figure 5.1 Interface signals An explanation of each signal is provided below. TX + / TX - These signals are the outbound high speed differential signals that are connected to the serial ATA cable.
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RxData Serially encoded 10b data attached to the high speed serial differential line receiver COMWAKE Signal from the out of band detector that indicates the COMWAKE out of band signal is being detected. COMRESET / COMINIT Host: Signal from the out of band detector that indicates the COMINIT out of band signal is being detected.
Interface 5.1.2 Signal interface regulation 5.1.2.1 Out of band signaling During OOB signaling transmissions, the differential and common mode levels of the signal lines shall comply with the same electrical specifications as for in-band data transmission, specified as follows. COMRESET/COMINIT COMWAKE 106.7 ns 106.7 ns...
5.1.2.2 Primitives descriptions The following table contains the primitive mnemonics and a brief description of each. Primitive Name ALIGN Physical layer control CONT Continue repeating previous primitive End of frame PMACK Power management acknowledge HOLD Hold data transmission HOLDA Hold acknowledge PMNAK Power management denial...
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Interface Primitive Name R_IP Reception in progress R_OK Reception with no error R_RDY Receiver ready Start of frame SYNC Synchronization WTRM Wait for frame termination X_RDY Transmission data ready Description Current node (host or device) is receiving payload. Current node (host or device) detected no error in received payload.
5.1.3 Electrical specifications Table 5.1 Physical Layer Electrical Requirements (1/3) a) General Specifications Units Channel Speed Fbaud FER, Frame Error Rate Unit Interval tol, TX Frequency Long Term Stability SSC, Spread-Spectrum Modulation Frequency tol, Spread-Spectrum Modulation Deviation cm,dc, DC Coupled Common Mode Voltage cm,ac coupled, AC Coupled...
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Interface Table 5.1 Physical Layer Electrical Requirements (2/3) b) Transmitter Specifications Units diffTX, TX Pair Differential Impedance s-eTX, TX Single-Ended Impedance c) Transmitted Signal Requirements Units diffTX, mVppd TX Differential Output Voltage 20-80TX, (UI) TX Rise/Fall Time skewTX, TX Differential Skew TJ at Connector, Data-Data, 5UI DJ at Connector,...
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Table 5.1 Physical Layer Electrical Requirements (3/3) d) Receiver Specifications Units diffRX, RX Pair Differential Impedance s-eRX, RX Single-Ended Impedance e) OOB Specifications Units thresh, mVppd OOB Signal Detection Threshold OOB, UI During OOB Signaling COMINIT/COMRESET COMWAKE Transmit Burst Length COMINIT/COMRESET Transmit Gap Length COMWAKE...
Interface 5.1.4 Connector pinouts The pin definitions are shown in Table 5.2. Table 5.2 Connector pinouts “Key and spacing separate signal and power segments” Staggered Spin-up Mode/ Ready LED Power segment key Notes: Note) Since applying a single external supply voltage of 5 V enables this drive to operate it is unnecessary to supply +3.3 V and +12 V power supplies.
5.1.5 P11 function The disk drive supports the following functions when P11 pin in the power supply segment of interface connector is used as an input or output pin. P11 pin supports the functions as follows: Staggered Spin-up: • Driving Ready LED: •...
5.1.6 Hot Plug The disk drive is “Hot Plug Capable” which is based on Serial ATA II Extension to Serial ATA 1.0a Specification. It is recommended to use the pre-charge resistor for protection from over current at +5V power supply circuit in the host system when the disk drive is hot-plugged. (Refer to the Serial ATA II Extension to Serial ATA 1.0a Specification.) The equivalent circuit of +5V power supply at Hot Plugging is in the following figure.
Interface 5.2 Logical Interface The host system and the device communicate with each other by sending and receiving serial data. The host and the device have several dedicated communication layers between them. These layers have different functions, enabling communication between the different levels of layers within the host or device and between layers at the same level that link the host and device.
5.2.1 Communication layers Each of the layers is outlined below. Physical layer Detects, sends, and receives band signals. • Sends serial data to and receives it from the link layer. • Link layer Negotiates against mutual transfer requests between the host system and •...
Interface 5.2.2 Outline of the Shadow Block Register Each transport layer in the host system and device has a block register, which is called a Shadow Block Register in the host system, and a Block Register in the device. These registers are used when the host system issues a command to the device. Table 5.4 Shadow Block Register Read Error...
5.2.3 Outline of the frame information structure (FIS) The transport layer converts data written in a Block Register into the FIS, and sends it to the upper layer. The FIS, which is generated in the transport layer, is explained below. 5.2.3.1 FIS types The types of FIS are as follows (Each FIS is referred to as abbreviation in square brackets in this manual.):...
Interface The host system uses the Register - Host to Device FIS when information in the Register Block is transferred from the host system to the device. This is the mechanism for issuing the ATA command from the host system to the device. C - To update the Command field, "1"...
5.2.3.5 DMA Setup - Device to Host or Host to Device (Bidirectional) The DMA Setup - Device to Host or Host to Device FIS has the following layout: Reserved (0) Figure 5.7 DMA Setup - Device to Host or Host to Device FIS layout The DMA Setup - Device to Host or Host to Device FIS communicates the start of a first-party DMA access to the host system.
Interface 5.2.3.6 BIST Active - Bidirectional The BIST Active - Bidirectional FIS has the following layout: Reserved (0) Pattern definition T A S L F P R V Data [31:24] Data [31:24] Figure 5.8 BIST Active - Bidirectional FIS layout The BIST Active - Bidirectional FIS is used to set the receiver to Loop Back mode.
5.2.3.7 Data - Host to Device or Device to Host (Bidirectional) This Data FIS has the following layout: Reserved (0) … … Figure 5.9 Data FIS (Bidirectional) layout The Data FIS is used for data transfers between the host system and device. 5.2.3.8 PIO Setup –...
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Interface FIS Type - Cyl Low - Cyl Low (exp) - Cyl High - Cyl High (exp) - Dev / Head - Dev / Head (exp) - Contains the contents of the expanded address field of the E_Status - Error - Sector Count - Sector Count (exp) - Contains the contents of the expanded address field of the Sector Number -...
5.2.3.9 Set Device Bits – Device to Host Error R Status Hi R Status Lo R I R Figure 5.11 Set Device Bits FIS The Set Device Bits - Device to Host FIS is used by the device to load Shadow Command Block bits for which the device has exclusive write access.
Interface 5.2.4 Shadow block registers Error Field The Error Field indicates the status of the command executed by the device. The fields are valid when the ERR bit of the Status field is 1. This register contains a diagnostic code after power is turned on, the COMRESET or the EXECUTIVE DEVICE DIAGNOSTIC command is executed.
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- X’05’: Reading the system area is abnormal. - X’06’: Calibration is abnormal. Features Field (exp) The Features Field provides specific feature to a command. For instance, it is used with SET FEATURES command to enable or disable caching. Sector Count Field (exp) The Sector Count Field indicates the number of sectors of data to be transferred in a read or write operation between the host system and the device.
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Interface Cylinder High Field (exp) The contents of this field indicates high-order 8 bits of the disk-access start cylinder address. At the end of a command, the contents of this field are updated to the current cylinder number. The high-order 8 bits of the cylinder address are set to the Cylinder High Register.
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Status field The contents of this field indicate the status of the device. The contents of this field are updated at the completion of each command. When the BSY bit is 1, other bits of this field, are invalid. Bit 7 Bit 6 DRDY - Bit 7:...
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Interface Command Field The Command Field contains a command code being sent to the device. After this field is written, the command execution starts immediately. Table 5.3 lists the executable commands and their command codes. This table also lists the necessary parameters for each command which are written to certain fields before the Command register is written.
5.3 Host Commands The host system issues a command to the device by writing necessary parameters in related fileds in the shadow block registers and writing a command code in the Command field of the shadow block registers. The device can accept the command when the BSY bit is 0 (the device is not in the busy status).
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Interface Table 5.6 Command code and parameters (2/3) COMMAND NAME IDLE CHECK POWER MODE SLEEP SMART DEVICE CONFIGURATION READ MULTIPLE WRITE MULTIPLE SET MULTIPLE MODE READ DMA WRITE DMA READ BUFFER FLUSH CACHE WRITE BUFFER IDENTIFY DEVICE IDENTIFY DEVICE DMA SET FEATURES SECURITY SET PASSWORD SECURITY UNLOCK...
Interface 5.3.2 Command descriptions The contents of the shadow block registers to be necessary for issuing a command and the example indication of the shadow block registers at command completion are shown as following in this subsection. Example: READ SECTOR (S) At command issuance (Shadow Block Registers setting contents) CH EXP...
RECALIBRATE (X’10’ to X’1F’) This command performs the calibration. When the device completes the calibration, the device reports the status to the host system. This command can be issued in the LBA mode. • Error reporting conditions (1) An error was detected during head positioning (ST = 51h, ER = 02h). (2) A SATA communication error occurred (ST = 51h, ER = 14h).
Interface READ SECTOR(S) (X’20’ or X’21’) This command reads data of sectors specified in the Sector Count field from the address specified in the Device/Head, Cylinder High, Cylinder Low and Sector Number fields. Number of sectors can be specified from 1 to 256 sectors. To specify 256 sectors reading, ‘00’...
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At command issuance (Shadow Block Registers setting contents) (R: Retry) At command completion (Shadow Block Registers contents to be read) *1 If the command is terminated due to an error, the remaining number of sectors of which data was not transferred. C141-E249 HD No.
Interface WRITE SECTOR(S) (X’30’ or X’31’) This command writes data of sectors from the address specified in the Device/Head, Cylinder High, Cylinder Low, and Sector Number fields to the address specified in the Sector Count field. Number of sectors can be specified from 1 to 256 sectors.
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At command issuance (Shadow Block Registers setting contents) (R: Retry) At command completion (Shadow Block Registers contents to be read) If the command was terminated because of an error, the number of sectors for which data has not been written is set in this field. C141-E249 HD No.
Interface WRITE VERIFY (X’3C’) This command operates similarly to the WRITE SECTOR(S) command except that the device verifies each sector immediately after being written. The verify operation is a read and check for data errors without data transfer. Any error that is detected during the verify operation is posted.
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At command completion (Shadow Block Registers contents to be read) *1 If the command is terminated because of an error, the number of remaining sectors for which data has not been written or verified is set in this register. C141-E249 Status information HD No.
Interface READ VERIFY SECTOR(S) (X’40’ or X’41’) This command operates similarly to the READ SECTOR(S) command except that the data is not transferred to the host system. After all requested sectors are verified, the device reports the status to the host system.
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At command completion (Shadow Block Registers contents to be read) *1 If the command is terminated due to an error, the remaining number of sectors of which data was not transferred is set in this register. C141-E249 Status information HD No. / LBA Start cylinder No.
Interface SEEK (X’70’ to X’7F’) This command performs a seek operation to the track and selects the head specified in the command block registers. After completing the seek operation, the device reports the status to the host system. In the LBA mode, this command performs the seek operation to the cylinder and head position in which the sector is specified.
EXECUTE DEVICE DIAGNOSTIC (X’90’) This command performs an internal diagnostic test (self-diagnosis) of the device. The device reports the diagnostic result and status to the host. Table 5.7 lists the diagnostic code written in the Error field which is 8-bit code. Code X’00’...
Interface INITIALIZE DEVICE PARAMETERS (X’91’) The host system can set the number of sectors per track and the maximum head number (maximum head number is “number of heads minus 1”) per cylinder with this command. Upon receipt of this command, the device sets the parameters. Then the device reports the status to the host system.
DOWNLOAD MICROCODE (X’92’) At command issuance (Shadow Block Registers setting contents) At command completion (Shadow Block Registers contents to be read) This command rewrites the microcode of the device (firmware). When this command is accepted, the device does beginning the data transfer of the microcode or the microcode rewriting according to Subcommand code (Rewriting is also possible simultaneously with the data transfer).
Interface **: In the following cases, Subcommand code=07h returns Abort as an error though becomes Microcode rewriting execution specification. 1) Abnormality of the transmitted Microcode data is detected. 2) The data transfer is not done (The number of transfer: 0). 3) The DOWNLOAD MICROCODE command is not continuously issued when the transfer has been divided into multiple transfers.
(10) STANDBY IMMEDIATE (X’94’ or X’E0’) Upon receipt of this command, the device enters the standby mode. The device then reports the status to the host system. This command does not support the APS timer function. • Error reporting conditions (1) A SATA communication error occurred (ST = 51h, ER = 14h).
Interface (11) IDLE IMMEDIATE (X’95’ or X’E1’) /UNLOAD IMMEDIATE (X’95’ or X’E1’) • Default Function Upon receipt of this command, the device enters the idle mode. Then, the device reports the status to the host system. This command does not support the APS timer function.
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• Unload Feature (Unload Immediate Command): When the device received the IDLE IMMEDIATE command with the UNLOAD FEATURE, the head(s) is unloaded to the ramp position. After the device completed the unload operation, the INTRQ signal will be asserted and the BUSY flag will be cleared.
Interface (12) STANDBY (X’96’ or X’E2’) Upon receipt of this command, the device enters the standby mode. If the device has already spun down, the spin-down sequence is not implemented. If the Sector Count field has a value other than "0," the APS timer is set when the command is received.
(13) IDLE (X’97’ or X’E3’) Upon receipt of this command, the device enters the idle mode. The device report the status even if the device has not fully entered the idle mode. If the spindle of the device is already rotating, the spin-up sequence shall not be implemented. By using this command, the APS (Automatic Power Standby) timer function is enabled and the timer immediately starts the countdown.
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Interface At command completion (Shadow Block Registers contents to be read) 5-52 Status information Error information C141-E249...
(14) CHECK POWER MODE (X’98’ or X’E5’) The host checks the power mode of the device with this command. The host system can confirm the power save mode of the device by the contents of the Sector Count field after executing this command. The device sets the following field value.
Interface (15) SLEEP (X’99’ or X’E6’) This command is the only way to make the device enter the sleep mode. Upon receipt of this command, the device enters the sleep mode, then reports the status to the host system. The device report the status even if the device has not fully entered the sleep mode.
(16) SMART (X’B0’) This command predicts the occurrence of device failures depending on the subcommand specified in the Features field. If the Features field contains values that are not supported with the command, the Aborted Command error is issued. Before issuing the command, the host must set the key values in the Cylinder Low and Cylinder High field (4Fh in the Cylinder Low field and C2h in the Cylinder High field).
Interface Table 5.10 Features Field values (subcommands) and functions (1/3) Features Field X’D0’ SMART READ DATE: A device that received this subcommand saves all the updated attribute values. The device then transfers 512-byte attribute value information to the host after transferring PIOSU. * For information about the format of the attribute value information, see Table 5.11.
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Table 5.10 Features Field values (subcommands) and functions (2/3) Features Field X’D5’ SMART READ LOG: A device which receives this sub-command reads the log sector specified in the Sector Number Field. Next, it transfers the PIOSU and transmits the log sector to the host computer.
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Interface Table 5.10 Features Field values (subcommands) and functions (3/3) X’D9’ SMART DISABLE OPERATIONS: This subcommand disables SMART. The setting is maintained even when the device is turned off and then on. When the device receives this subcommand, it disables SMART, then transfers the RegDH.
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At command issuance (Shadow Block Registers setting contents) At command completion (Shadow Block Registers contents to be read) The attribute value information is 512-byte data; the format of this data is shown the following Table 5.11. The host can access this data using the SMART READ DATE subcommand (Features field = D0h).
Interface Table 5.11 Format of device attribute value data Byte Data format version number Attribute 1 07 to 0C 0E to 169 Attribute 2 to attribute 30 Off-line data collection status Self-test execution status 16C, 16D Off-line data collection execution time [sec.] Reserved Off-line data collection capability 170, 171...
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• Data format version number The data format version number indicates the version number of the data format of the device attribute values or guarantee failure thresholds. The data format version numbers of the device attribute values and guarantee failure thresholds are the same.
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Interface • Status Flag If this bit is 1, it indicates normal operations are assured with the attribute when the attribute value exceeds the threshold value. If this bit is 1 (0), it indicates the attribute only updated by an on- line test (off-line test).
Table 5.13 Off-line data collection status Status Byte 00h or 80h Off-line data collection is not executed. 02h or 82h Off-line data collection has ended without an error. 04h or 84h Off-line data collection is interrupted by a command from the host. 05h or 85h Off-line data collection has ended before completion because of a command from the host.
Interface • Off-line data collection capability Indicates the method of off-line data collection carried out by the drive. If the off- line data collection capability is 0, it indicates that off-line data collection is not supported. Table 5.15 Off-line data collection capability If this bit is 1, it indicates that the SMART EXECUTE OFF- LINE IMMEDATE sub-command (Features field = D4h) is supported.
• Checksum Two’s complement of the lower byte, obtained by adding 511-byte data one byte at a time from the beginning. • Guarantee failure threshold The limit of a varying attribute value. The host compares the attribute values with the thresholds to identify a failure. Table 5.18 Log Directory Data Format Byte SMART Logging Version...
Interface Table 5.19 Data format of SMART Summary Error Log (1/2) Byte Version of this function Pointer for the latest “Error Log Data Structure” 02 to 0D 0E to 19 1A to 25 26 to 31 Error log data structure 3A to 3D 46 to 58 5A, 5B...
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Table 5.19 Data format of SMART Summary Error Log (2/2) Byte 5C to 1C3 1C4, 1C5 Total number of drive errors 1C6 to 1FE Reserved Check sum • Command data structure Indicates the command received when an error occurs. • Error data structure Indicates the status register when an error occurs.
Interface Table 5.20 Data format of SMART Comprehensive Error Log Byte SMART Error Logging 01h Index Pointer Latest Error Data Structure 02…5B Error Log Data Structure 5C…B5 Error Log Data Structure2 B6…10F Error Log Data Structure3 110…169 Error Log Data Structure4 16A…1C3 Error Log Data Structure5 1C4…1C5...
Table 5.21 SMART self-test log data format Byte 00, 01 Self-test log data structure Self-test log 1 04, 05 07 to 0A 0B to 19 1A to 1F9 Self-test log 2 to 21 1FA, 1FB Vendor unique Self-test index 1FD, 1FE Reserved Check sum •...
• Current Span under test As the self-test progress, the device shall modify this value to contain the test span number currently being tested. • Feature Flags Table 5.23 Selective self-test feature flags Vendor specific (unused) When set to one, perform off-line scan after selective test Vendor specific (unused) When set to one, off-line scan after selective test is pending.
Interface • SMART Command Transport (SCT) This command supports the following functions by using the SMART command according to the value specified for the SN field and the FR field. Moreover, WRITE LOG EXT/READ LOG EXT is used in 48-CMD environment. Table 5.24 SCT command and the function Sector Number Features field...
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• SCT STATUS REQUEST (SN = E0h, FR = D5h) This command is used to know the status data of SCT shown in Table 5.25 of the device. At command issuance (Shadow Block Registers setting) At command completion (Shadow Block Registers contents to be read) C141-E249 Key (C2h) Key (4Fh)
Interface Table 5.25 Format of SCT STATUS Response (1/2) BYTE 000h Format Version 001h 002h SCT Version 003h 004h SCT Spec 005h Status Flag Bit31-1: Reserved 006h Bit0: Initialized flag (maintained Power-OFF/ON) 007h 0 = When any user LBA is written, this bit is cleared. 008h This bit is also cleared if the capacity of the drive is changed via 009h...
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Table 5.25 Format of SCT STATUS Response (2/2) BYTE 014h Reserved 027h 028h Current LBA of SCT command executing in background. 02Fh 030h Reserved 0C7h HDA Temp [°C] 0C8h Current drive HDA temperature. 0C9h Reserved Max Temp [°C] 0CAh Maximum HDA temperature this power cycle. 0CBh Reserved Life Max Temp [°C]...
Interface Table 5.26 SCT STATUS code Code 0000h Command complete without error. 0001h Invalid Function Code. 0002h Input LBA out of range. 0003h Request sector count over flow. 0004h Invalid Function Code in Error Recovery Control command. 0005h Invalid Selection Code in Error Recovery Control command. 0006h Host read command timer is less than minimum value.
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• SCT COMMAND SET (SN = E0h, FR = D6) This command transfers Key Sector Format in 512 bytes including the action code shown in Table 5.27 to the device, and executes each function to show in Table 5.28 to Table 5.31. 28-bit command At command issuance (Shadow Block Registers setting) At command completion (Shadow Block Registers contents to be read)
Interface Code 0000h Reserved 0001h Not supported WRITE SAME 0002h See Table 5.28. ERROR RECOVERY CONTROL 0003h See Table 5.29. FEATURE CONTROL 0004h See Table 5.30. SCT DATA TABLE 0005h See Table 5.31. 0006h Reserved BFFFh C000h Vender Specific FFFFh Table 5.28 WRITE SAME (1/2) Byte Name...
Table 5.28 WRITE SAME (2/2) Byte Name Value 00Ch Count (8 byte) 013h 014h Pattern (4 byte) 017h 018h (Reserved) 1FFh * It is invalid excluding the description value. Table 5.29 ERROR RECOVERY CONTROL Byte Name Value 000h Action Code 0003h 001h 0001h...
Table 5.31 SCT DATA TABLE Byte Name Value 000h Action Code 0005h 001h 002h Function Code 0001h 003h 0000h 0001h 0002h 004h 0003h Table ID 005h CFFFh D000h FFFFh 006h (Reserved) 1FFh C141-E249 Description SCT DATA TABLE Read Data Table Invalid Reserved HAD Temperature History Table.
Interface Table 5.32 HAD Temperature Byte 000h Format Version 001h 002h Sampling Period Frequency of sampling each set time of temperature log. 003h 004h Interval 005h Time of temperature log of interval (min) Max Operation Limit (°C) 006h 007h Over Limit (°C) Min Operation Limit (°C) 008h 009h...
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• SCT READ DATA (SN = E1h, FR = D5) This command reads the data specified with SCT SET COMMAND and number of sectors specified Sector Count field 28-bit command At command issuance (Shadow Block Registers setting) At command completion (Shadow Block Registers contents to be read) SCT READ DATA Command issue procedure.
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Interface • SCT WRITE DATA (SN = E1h, FR = D6) This command writes the data of the number of sectors for which the data specified with SCT SET COMMAND and number of sectors specified Sector Count Field. 28-bit command At command issuance (Shadow Block Registers setting) At command completion (Shadow Block Registers contents to be read) SCT WRITE DATA Command issue procedure.
(17) DEVICE CONFIGURATION (X'B1') Individual Device Configuration Overlay feature sub commands are identified by the value placed in the Features field. The following table shows these Features field values. If this command sets with the reserved value of Features field, an aborted command error is posted.
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Interface • DEVICE CONFIGURATION RESTORE (Features Field = C0h) The DEVICE CONFIGURATION RESTORE command disables any setting previously made by a DEVICE CONFIGURATION SET command and returns the content of the IDENTIFY DEVICE command response to the original settings as indicated by the data returned from the execution of a DEVICE CONFIGURATION IDENTIFY command.
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• DEVICE CONFIGURATION IDENTIFY (Features Field = C2h) The DEVICE CONFIGURATION IDENTIFY command returns information shown in Table 5.33. The content of this data structure indicates the selectable commands, modes, and feature sets that the device is capable of supporting. If a DEVICE CONFIGURATION SET command has been issued reducing the capabilities, the response to an IDENTIFY DEVICE command will reflect the reduced set of capabilities, however, the DEVICE CONFIGURATION...
Interface Table 5.33 DEVICE CONFIGURATION IDENTIFY data structure (1/2) Word Value X'0002' Data structure revision X'0007' Multiword DMA modes supported Reflected in IDENTIFY information "WORD63". Bits 15-3: Bit 2: Bit 1: Bit 0: X'003F' Ultra DMA modes supported Reflected in IDENTIFY information "WORD88". Bits 15-7: Bit 6: Bit 5:...
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Table 5.33 DEVICE CONFIGURATION IDENTIFY data structure (2/2) Word Value X'0015' Serial-ATA command set/function → Reflected in IDENTIFY information ”Word 76 to 79. Bits 15-5: Bit 4: Bit 3: Bit 2: Bit 1: Bit 0: X'0000' Reserved for Serial-ATA 10 to 20 X'0000' Reserved X'2000'...
Interface (18) READ MULTIPLE (X’C4’) The READ MULTIPLE command performs the same tasks as the READ SECTOR(S) command except that this command sends the PIO Setup FIS before sending data blocks of multiple sectors. The PIO Setup FIS is sent only before the first data block is transferred, and it is not sent before any subsequent transfer of sector blocks.
Host Figure 5.12 Execution example of READ MULTIPLE command • Error reporting conditions (1) A specified address exceeds the range where read operations are allowed (ST = 51h, ER = 10h). (2) The range where read operations are allowed will be exceeded by an address during a read operation (ST = 51h, ER = 10h).
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Interface At command issuance (Shadow Block Registers setting contents) At command completion (Shadow Block Registers contents to be read) *1 If the command is completed normally, the number of remaining sectors is set in this field. If the command is terminated because of an error, the number of sectors for which data has not been transferred is set in the field.
(19) WRITE MULTIPLE (X’C5’) The WRITE MULTIPLE command performs the same tasks as the WRITE SECTOR(S) command except that this command sends the PIO Setup FIS before sending data blocks of multiple sectors. The PIO Setup FIS is sent only before the first data block is transferred, and it is not sent before any subsequent transfer of sector blocks .
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Interface At command issuance (Shadow Block Registers setting contents) (R: Retry) At command completion (Shadow Block Registers contents to be read) *1 If the command was terminated because of an error, the number of sectors for which data has not been written is set in this field. 5-94 HD No.
(20) SET MULTIPLE MODE (X’C6’) This command enables the device to perform the READ MULTIPLE and WRITE MULTIPLE commands. The block count (number of sectors in a block) for these commands are also specified by the SET MULTIPLE MODE command. The number of sectors per block is written into the Sector Count field.
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Interface At command completion (Shadow Block Registers contents to be read) 5-96 Status information Sector count/block Error information C141-E249...
(21) READ DMA (X’C8’ or X’C9’) The READ DMA command reads data from sectors, starting from the sectors specified in the Device/Head, Cylinder High, Cylinder Low, and Sector Number fields and continuing for as many sectors as specified in the Sector Count field. A value ranging from 1 to 256 can be specified for the number of sectors.
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Interface At command issuance (Shadow Block Registers setting contents) At command completion (Shadow Block Registers contents to be read) *1 If the command is terminated due to an error, the remaining number of sectors of which data was not transferred is set in this register.
(22) WRITE DMA (X’CA’ or X’CB’) The WRITE DMA command writes data to sectors starting from the sectors specified in the Device/Head, Cylinder High, Cylinder Low, and Sector Number fields and continuing for as many sectors as specified in the Sector Count field. A value ranging from 1 to 256 can be specified for the number of the sectors.
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Interface At command issuance (Shadow Block Registers setting contents) At command completion (Shadow Block Registers contents to be read) *1 If the command was terminated because of an error, the number of sectors for which data has not been written is set in this field. 5-100 HD No.
(23) READ BUFFER (X’E4’) The host system can read the current contents of the data buffer of the device by issuing this command. Upon receipt of this command, the device transfers the PIO Setup. After that, the host system can read up to 512 bytes of data from the buffer. •...
Interface (24) FLUSH CACHE (X’E7’) This command is used to write every write cache data stored by the device into the medium. When the device completes all the data writing, it reports the status to the host system. The device performs every error recovery so that the data are read correctly.
(25) WRITE BUFFER (X’E8’) The host system can overwrite the contents of the data buffer of the device with a desired data pattern by issuing this command. Upon receipt of this command, the device transfers the PIO Setup. After that, 512 bytes of data is transferred from the host and the device writes the data to the buffer, then reports the status .
Interface (26) IDENTIFY DEVICE (X’EC’) The host system issues the IDENTIFY DEVICE command to read parameter information from the device. When it receives the command, the device prepares the parameter information to be sent to the host. Next, the device sends the PIO Setup FIS to the host, then sends the parameter information including a 512-byte date.
(27) IDENTIFY DEVICE DMA (X’EE’) When this command is not used to transfer data to the host in DMA mode, this command functions in the same way as the Identify Device command. • Error reporting conditions (1) A SATA communication error occurred (ST = 51h, ER = 0Ch). At command issuance (Shadow Block Registers setting contents) At command completion (Shadow Block Registers contents to be read) C141-E249...
Interface Table 5.34 Information to be read by IDENTIFY DEVICE command (1/3) Word Value X’045A’ General Configuration X’3FFF’ Number of Logical cylinders X’C837’ Detailed Configuration X’0010’ Number of Logical Heads X’0000’ Undefined X’003F’ Number of Logical sectors per Logical track X’0000’...
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Table 5.34 Information to be read by IDENTIFY DEVICE command (2/3) Word Value X’0078’ Minimum multiword DMA transfer cycle time per word: 120 [ns] X’0078’ Manufacturer’s recommended DMA transfer cycle time: 120 [ns] X’0078’ Minimum PIO transfer cycle time without IORDY flow control: 120 [ns] X’0078’...
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Interface Table 5.34 Information to be read by IDENTIFY DEVICE command (3/3) Word Value X’xxxx’ 15:12 NAA_ID(3:0) 11:0 X’xxxx’ 15:4 X’xxxx’ 15:0 X’xxxx’ 15:0 112-116 X’0000’ Reserved 117-118 X’0100’ Number of words for logical sectors X’400x’ Features Implemented Word (Supported Settings) X’400x’...
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Interface *5 Word 50: Device capability Bit 15: Bit 14: Bit 13 to 1 Reserved Bit 0 Standby timer value '1' = Standby timer value of the device is the smallest value. *6 Word 51: PIO data transfer mode Bits 15-8: PIO data transfer mode Bits 7-0: Undefined *7 Word 53: Enable/disable setting of word 54-58 and 64-70...
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*10 Word 64: Advance PIO transfer mode support status Bits 15-8: Reserved Bits 7-0: Advance PIO transfer mode Bit 1: '1' = Mode 4 supported Bit 0: '1' = Mode 3 supported *11 WORD 75: X ' 001F ' (32) *12 WORD 76 Bits 15-11: Reserved Bit 10:...
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Interface *13 WORD 78 Bits 15-7: Reserved Bit 6: '1' = Supports the software settings preservation. Bit 5: Reserved Bit 4: '1'= Supports the in-order data delivery. Bit 3: '1'= Supports the Power Management initiation from the device to Bit 2: '1' = Supports the DMA Setup FIS Auto-Activate optimization.
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*16 WORD 82 Bit 15: Undefined Bit 14: '1' = Supports the NOP command. Bit 13: '1' = Supports the READ BUFFER command. Bit 12: '1' = Supports the WRITE BUFFER command. Bit 11: Undefined Bit 10: '1' = Supports the Host Protected Area feature set. Bit 9: '1' = Supports the DEVICE RESET command.
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Interface Bit 3: Bit 2: Bit 1: Bit 0: *18 WORD 84 Bit 15: = 0 The device always returns the fixed value indicated on the left. Bit 14: = 1 The device always returns the fixed value indicated on the left. Bit 13: '1' = Support the Unload Immediate command.
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Bit 2: '1' = Supports the Removable Media function. Bit 1: '1' = From the SECURITY SET PASSWORD command Bit 0: '1' = From the SMART ENABLE OPERATION command *20 WORD 86 Bit 15: '1' = The values in WORD119-120 are valid. Bit 14: Reserved Bits 13-10: Same definition as WORD 83.
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Interface Bit 3: '1' = Supports the Mode 3 Bit 2: '1' = Supports the Mode 2 Bit 1: '1' = Supports the Mode 1 Bit 0: '1' = Supports the Mode 0 *23 WORD 89 Execution time of SECURITY ERASE UNIT command Value 1-254 *24 WORD 94...
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*27 WORD 119 Bit 15: Bit 14: Bits 13-3: 0 Bit 2: '1' = WRITE UNCORRECTABLE is supported. Bit 1: '1' = Write-Read-Verify feature set is supported. Bit 0: '1' = Clearing DRQ bit to zero when error bit is set is supported. *28 WORD 120 Bit 15: Bit 14:...
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Interface *30 WORD 206: SCT Command Transport Bits 15-6: Reserved Bit 5: '1' = SCT Data Tables supported. Bit 4: '1' = SCT Features Control supported. Bit 3: '1' = SCT Error Recovery Control supported. Bit 2: '1' = SCT Write Same supported. Bit 1: '1' = SCT Long Sector Access supported.
(28) SET FEATURES (X’EF’) The host system issues the SET FEATURES command to set parameters in the Features field for the purpose of changing the device features to be executed. Upon receipt of this command, the device sets the parameters in the Features field, then reports the status to the host system.
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Interface Table 5.35 Features field values and settable modes (2/2) Features Field X ' 88’ Undefined (Note 1) X ' 8B’ Disable Write-Read-Verify feature set. X ' 90’ Disables the Serial ATA function. X ' 99’ Undefined (Note 1) X ' AA ' Enables the read cache function.
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• Error reporting conditions (1) An undefined code is specified in the FR or SC field (ST = 51h, ER = 04h). (2) A SATA communication error occurred (ST = 51h, ER = 14h). At command issuance (Shadow Block O registers setting contents) At command completion (Shadow Block Registers contents to be read) C141-E249 xx or *1~3...
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Interface Data Transfer Mode The host sets X’03’ to the Features field. By issuing this command with setting a value to the Sector Count field, the transfer mode can be selected. Upper 5 bits of the Sector Count register defines the transfer type and lower 3 bits specifies the binary mode value.
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Advanced Power Management (APM) The host writes the Sector Count field with the desired power management level and executes this command with the Features field X’05’, and then Advanced Power Management is enabled. The drive automatically shifts to power saving mode up to the specified APM level when the drive does not receive any commands for a specific time.
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Interface Serial ATA Functions The host can enable and disable the following Serial ATA functions by issuing this command after setting X'10/90' in the Features field and an applicable value in the Sector Count field: Serial ATA function Non-zero buffer offset in DMA Setup FIS DMA Setup FIS Auto-Activate optimization Device-initiated interface power state Transitions Guaranteed In-Order Data Delivery...
Automatic Acoustic Management (AAM) The host writes to the Sector Count filed with the requested acoustic management level and executes this command with subcommand code 42h, and then Automatic Acoustic Management is enabled. The AAM level setting is preserved by the drive across power on and COMRESET.
Interface (29) SECURITY SET PASSWORD (X’F1’) This command enables a user password or master password to be set. The host transfers the 512-byte data shown in Table 5.37 to the device. The device determines the operation of the lock function according to the specifications of the Identifier bit and Security level bit in the transferred data.
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• Error reporting conditions (1) The device is in Security Locked mode (ST = 51h, ER = 04h). (2) The device is in Security Frozen mode (ST = 51h, ER = 04h). (3) A SATA communication error occurred (ST = 51h, ER = 14h). At command issuance (Shadow Block Registers setting contents) At command completion (Shadow Block Register contents to be read) C141-E249...
Interface (30) SECURITY UNLOCK(X’F2’) This command cancels LOCKED MODE. The host transfers the 512-byte data shown in Table 5.39 to the device. Operation of the device varies as follows depending on whether the host specifies the master password. • When the master password is selected When the security level is LOCKED MODE is high, the password is compared with the master password already set.
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At command completion (Shadow Block Register contents to be read) C141-E249 Status information Error information 5.3 Host Commands 5-129...
Interface (31) SECURITY ERASE PREPARE (X’F3’) The SECURITY ERASE UNIT command feature is enabled by issuing the SECURITY ERASE PREPARE command and then the SECURITY ERASE UNIT command. The SECURITY ERASE PREPARE command prevents data from being erased unnecessarily by the SECURITY ERASE UNIT command. •...
(32) SECURITY ERASE UNIT (X’F4’) This command erases all user data. This command also invalidates the user password and releases the lock function. The host transfers the 512-byte data shown in Table 5.39 to the device. The device compares the user password or master password in the transferred data with the user password or master password already set.
Interface (33) SECURITY FREEZE LOCK (X’F5’) This command puts the device into FROZEN MODE. The following commands used to change the lock function return the Aborted Command error if the device is in FROZEN MODE. SECURITY SET PASSWORD • SECURITY UNLOCK •...
Interface (34) SECURITY DISABLE PASSWORD (X’F6’) This command invalidates the user password already set and releases the lock function. The host transfers the 512-byte data shown in Table 5.39 to the device. The device compares the user password or master password in the transferred data with the user password or master password already set, and releases the lock function if the passwords are the same.
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• Error reporting conditions (1) An incorrect password is specified (ST = 51h, ER = 04h). (2) The device is in Security Locked mode (ST = 51h, ER = 04h). (3) The device is in Security Frozen mode (ST = 51h, ER = 04h). (4) A SATA communication error occurred (ST = 51h, ER = 14h).
Interface (35) READ NATIVE MAX ADDRESS (X’F8’) This command posts the maximum address intrinsic to the device, which can be set by the SET MAX ADDRESS command. Upon receipt of this command, the device indicates the maximum address in the DH, CH, CL and SN field. Then reports the status to the host system.
(36) SET MAX (X’F9’) SET MAX Features Register Values Value 05h - FFh • SET MAX ADDRESS A successful READ NATIVE MAX ADDRESS command shall immediately precede a SET MAX ADDRESS command. This command allows the maximum address accessible by the user to be set in LBA or CHS mode.
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Interface • Error reporting conditions (1) The command has been issued more than twice (ST = 51h, ER = 10h). (2) The READ NATIVE MAX ADDRESS command has not been issued prior to the SET MAX ADDRESS command. (ST = 51h, ER = 04h). (3) The SET MAX ADDRESS (EXT) command has been issued (ST = 51h, ER = 04h).
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• Error reporting conditions (1) The device is in Set Max Locked mode or Set Max Freeze Locked mode (ST = 51h, ER =04h). (2) A SATA communication error occurred (ST = 51h, ER = 14h). At command issuance (Shadow Block Registers setting contents) At command completion (Shadow Block Registers contents to be read) Words 1 to 16...
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Interface • SET MAX LOCK (Features Field = 02h) The SET MAX LOCK command sets the device into SET_MAX_LOCK state. After this command is completed, any other SET MAX commands except SET MAX UNLOCK and SET MAX FREEZE LOCK commands are rejected. And the device returns command aborted.
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• SET MAX UNLOCK (Features Field = 03h) This command requests a transfer of single sector of data from the host, and defines the contents of SET MAX ADDRESS password. The password supplied in the sector of data transferred shall be compared with the stored password.
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Interface • SET MAX FREEZE LOCK (Features Field = 04h) The Set MAX FREEZE LOCK command sets the device to SET_MAX_Frozen state. After the device made a transition to the Set Max Freeze Lock state, the following SET MAX commands are rejected, then the device returns command aborted: −...
(37) READ SECTOR (S) EXT (X’24’) • Description This command is the extended command of the READ SECTOR (S) command. The LBA specification is increased from 28 bits to 48 bits, and the maximum number of sectors that can be transferred by a single command is changed from 100h to 10000h.
Interface (38) READ DMA EXT (X’25’) • Description This command is the extended command of the READ DMA command. The LBA specification is increased from 28 bits to 48 bits, and the maximum number of sectors that can be transferred by a single command is changed from 100h to 10000h.
(39) READ NATIVE MAX ADDRESS EXT (X’27’) • Description This command is used to assign the highest address that the device can initially set with the SET MAX ADDRESS EXT command. The maximum address is displayed in the CH(EXP), CL(EXP), SN(EXP) filed of the device shadow block registers.
Interface (40) READ MULTIPLE EXT (X’29’) • Description This command is the extended command of the READ MULTIPLE command. The LBA specification is increased from 28 bits to 48 bits, and the maximum number of sectors that can be transferred by a single command is changed from 100h to 10000h.
(41) READ LOG EXT (X'2F') The READ LOG EXTEND command reads versatile log data. Versatile log data includes the Extended SMART Comprehensive Error log, the Extended SMART Self-test log, and the SMART Selective log. The effectiveness of the log types depends on customization.
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Interface At command issuance (Shadow Block Registers setting contents) CH EXP CL EXP SN EXP SC EXP FR EXP At command completion (Shadow Block Registers contents to be read) CH EXP CL EXP SN EXP SC EXP 5-148 Sector offset (15-8) Sector offset (7-0) Log address Sector count (15-8)
Table 5.40 Data format of Read Log Ext log page 10h Byte Tag field Reserved Status field value Error field value Sector Number field value Cylinder Low field value Cylinder High field value Dev/Head field value Sector Number Exp field value Cylinder Low Exp field value Cylinder High Exp field value Reserved...
Interface Table 5.42 Data format of Read Log Ext log page 11h Byte 00 to 03 Reserved 04 to 05 Counter 1 Identifier 06 to 09 Counter 1 Value 0A to 0B Counter 2 Identifier 0C to 0F Counter 2 Value …...
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• SCT STATUS REQUEST (SN = E0h) Refer to SMART Command Transport (SCT). At command issuance (Shadow Block Registers setting) CH EXP CL EXP SN EXP SC EXP FR EXP At command completion (Shadow Block Registers contents to be read) CH EXP CL EXP SN EXP...
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Interface • SCT READ DATA (SN = E1h, FR = D5) Refer to SMART Command Transport (SCT). At command issuance (Shadow Block Registers setting) CH EXP CL EXP SN EXP SC EXP FR EXP At command completion (Shadow Block Registers contents to be read) CH EXP CL EXP SN EXP...
(42) WRITE SECTOR (S) EXT (X’34’) • Description This command is the extended command of the WRITE SECTOR (S) command. The LBA specification is increased from 28 bits to 48 bits, and the maximum number of sectors that can be transferred by a single command is changed from 100h to 10000h.
Interface (43) WRITE DMA EXT (X’35’) • Description This command is the extended command of the WRITE DMA command. The LBA specification is increased from 28 bits to 48 bits, and the maximum number of sectors that can be transferred by a single command is changed from 100h to 10000h.
(44) SET MAX ADDRESS EXT (X’37’) • Description This command limits specifications so that the highest address that can be accessed by users can be specified only in LBA mode. The address information specified with this command is set in words 1, 54, 57, 58, 60, 61, and 100 to 103 of the IDENTIFY DEVICE command response.
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Interface At command issuance (Shadow Block Registers setting contents) CH EXP CL EXP SN EXP SC EXP FR EXP At command completion (Shadow Block Registers contents to be read) CH EXP CL EXP SN EXP SC EXP 5-156 SET MAX LBA (47-40) SET MAX LBA (23-16) SET MAX LBA (39-32) SET MAX LBA (15-8)
(45) WRITE MULTIPLE EXT (X’39’) • Description This command is the extended command of the WRITE MULTIPLE command. The LBA specification is increased from 28 bits to 48 bits, and the maximum number of sectors that can be transferred by a single command is changed from 100h to 10000h.
Interface (46) WRITE LOG EXT (X'3F') The WRITE LOG EXTEND command writes versatile log data. Versatile log data includes the Extended SMART Comprehensive Error log, the Extended SMART Self-test log, and the SMART Selective log; and each log can be partially written with this command.
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At command issuance (Shadow Block Registers setting contents) CH EXP CL EXP SN EXP SC EXP FR EXP At command completion (Shadow Block Registers contents to be read) CH EXP CL EXP SN EXP SC EXP C141-E249 Sector offset (15-8) Sector offset (7-0) Log address Sector count (15-8)
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Interface • SCT COMMAND SET (SN = E0h) Refer to SMART Command Transport (SCT). At command issuance (Shadow Block Registers setting) CH EXP CL EXP SN EXP SC EXP FR EXP At command completion (Shadow Block Registers contents to be read) CH EXP CL EXP SN EXP...
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• SCT WRITE DATA (SN = E1h ) Refer to SMART Command Transport(SCT). At command issuance (Shadow Block Registers setting) CH EXP CL EXP SN EXP SC EXP FR EXP At command completion (Shadow Block Registers contents to be read) CH EXP CL EXP SN EXP...
Interface (47) READ VERIFY SECTOR (S) EXT (X’42’) • Description This command is the extended command of the READ VERIFY SECTOR (S) command. The LBA specification is increased from 28 bits to 48 bits, and the maximum number of sectors that can be transferred by a single command is changed from 100h to 10000h.
(48) FLUSH CACHE EXT (X’EA’) • Description This command executes the same operations as the FLUSH CACHE command (E7h). However, only LBA=1 can be specified in the command. • Error reporting conditions (1) A SATA communication error occurred (ST = 51h, ER = 14h). At command issuance (Shadow Block Registers setting contents) CH EXP CL EXP...
Interface (49) WRITE MULTIPLE FUA EXT (X'CE') • Description The WRITE MULTIPLE FUA EXT command reports the status of a command after user data is written to a medium, regardless of whether the write cache feature is enabled or disabled. The other command control and error reporting conditions are the same as those of the WRITE MULTIPLE EXT command.
(50) WRITE DMA FUA EXT (X'3D') • Description The WRITE DMA FUA EXT command reports the status of a command after user data is written to a medium, regardless of whether the write cache feature is enabled or disabled. The other command control and error reporting conditions are the same as those of the WRITE DMA EXT command.
Interface (51) READ FP DMA QUEUED (X'60') • Description For details about control of the READ FP DMA QUEUED command, see Section 5.4.6. At command issuance (Shadow Block Registers setting contents) CH EXP CL EXP SN EXP SC EXP FR EXP At command completion (Shadow Block Registers contents to be read) CH EXP CL EXP...
(52) WRITE FP DMA QUEUED (X'61') • Description For details about control of the WRITE FP DMA QUEUED command, see Section 5.4.6. At command issuance (Shadow Block Registers setting contents) CH EXP CL EXP SN EXP SC EXP FR EXP At command completion (Shadow Block Registers contents to be read) CH EXP CL EXP...
Interface 5.4 Command Protocol The host should confirm that the BSY bit of the Shadow Block Status register of the device is 0 prior to issue a command. If BSY bit is 1, the host should wait for issuing a command until BSY bit is cleared to 0. Commands can be executed only when the DRDY bit of the Status register is 1.
Interface 5.4.2 PIO data-in command protocol Execution of the following commands involves data transfers from the device to the host system: IDENTIFY DEVICE • READ SECTOR(S) (EXT) • READ MULTI (EXT) • READ BUFFER • SMART READ DATA • SMATR READ LOG SECTOR •...
Host Figure 5.14 PIO data-in command protocol 5.4.3 PIO data-out command protocol Execution of the following commands involves data transfers from the host system to the device: WRITE SECTOR(S) (EXT) • WRITE MULTI (EXT) (FUA EXT) • WRITE BUFFER • WRITE VERIFY •...
Interface An outline of this protocol is as follows: 1) The device receives a PIO data-out command with the RegHD FIS. 2) If an error remaining in the device prevents command execution, the device sends the RegDH FIS with 1 set in the I bit. 3) When the device is ready to receive data, it sets 0 in the BSY bit and 1 in the DRQ bit of the Status field of the PIO Setup FIS.
5.4.4 DMA data-in command protocol DMA data-in commands include the following commands: READ DMA (EXT) • IDENTFY DEVICE • IDENTFY DEVICE DMA • The DMA mechanism transfers data of more than one block from the device to the host. The completion of a command is reported by an interruption. An outline of this protocol is as follows: 1) The device receives a DMA data-in command with the RegHD FIS.
Interface 5.4.5 DMA data-out command protocol The DMA data-out command is the following command: WRITE DMA (EXT) (FUA EXT) • The DMA mechanism transfers data of more than one block from the host to the device. The completion of the command is reported by an interruption. An outline of this protocol is as follows: 1) The device receives the DMA data-out command with the RegHD FIS.
5.4.6 Native Command Queuing protocol Native Queued commands include the following commands: READ FP DMA QUEUED WRITE FP DMA QUEUED An outline of the command queuing protocol is as follows: 1) After the device receives a Native Queued command, if the command is executable, the device sends to the host the RegDH FIS with the settings of I bit = 0, BSY bit = 0, and DRQ bit = 0, and it places the command in the command queue.
Interface 8) If an uncorrectable error occurs during command queuing, the device sends to the host the Set Device Bits FIS with the settings of ERR bit = 1, ERRReg = ATAErrCode, I bit = 1, and SActive = 0 to report an error. 9) After reporting the error, the device accepts only the READ LOG EXT command with page 10h specified and the reset requests (SoftReset and COMRESET).
Interface 5.5 Power-on and COMRESET Figure 5.20 shows the power-on sequence, and Figure 5.21 shows the COMRESET sequence. Immediately after power-on or COMRESET, the host sets 0x7Fh in the Status field of the Shadow Block Register and 0xFFh in other fields. After the power-on sequence shown below and after communication with the SATA interface is established, the host sets 0xFFh in the Status field of the Shadow Block Register.
CHAPTER 6 Operations Reset and Diagnosis Power Save Power Save Controlled by Interface Power Management (IPM) Read-ahead Cache Write Cache This chapter explains each of the above operations. C141-E249...
Operations 6.1 Reset and Diagnosis This section explains the device responses to power-on and an accepted reset. 6.1.1 Response to power-on Immediately after power is turned on, the host sets 0x7Fh in the Status field of the Shadow Block and 0xFFh in other fields. After communication with the SATA interface is established, the host sets 0xFFh in the Status field of the Shadow Block.
Operations 6.1.2 Response to COMRESET The response to COMRESET is almost the same as the response when power is turned on and a power-on reset is then cancelled. The device establishes communication with the SATA interface (PHY Ready) and sends the RegDH FIS (STS = 50h) to notify the host that the device is ready.
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6.1.2.1 Software settings preservation When a device is enumerated, software will configure the device using SET FEATURES and other commands. These software settings are often preserved across software reset but not necessarily across hardware reset. In Parallel ATA, only commanded hardware resets can occur, thus legacy software only reprograms settings that are cleared for the particular type of reset it has issued.
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Operations SET ADDRESS MAX (EXT) • The maximum LBA specified in SET MAX ADDRESS or SET MAX ADDRESS EXT. SET FEATURES (Write Cache Enable/Disable) • The write cache enable/disable setting established by the SET FEATURES command with subcommand code of 02h or 82h. SET FEATURES (Set Transfer Mode) •...
6.1.3 Response to a software reset When a software reset is accepted, the device performs a self-diagnosis, and it sends the RegDH FIS (STS = 50h) to notify the host that the device is ready. Then, the software reset sequence is completed. Figure 6.4 Response to a software reset C141-E249 6.1 Reset and Diagnosis...
Operations 6.2 Power Save The host can change the power consumption state of the device by issuing a power command to the device. 6.2.1 Power save mode There are five types of power consumption state of the device including active mode where all circuits are active.
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Upon receipt of a COMRESET • Upon receipt of Idle/Idle Intermediate • (4) Standby mode In this mode, the spindle motor has stopped from the low power idle state. The device can receive commands through the interface. However if a command with disk access is issued, response time to the command under the standby mode takes longer than the active, active idle, or low power idle mode because the access to the disk medium cannot be made immediately.
Operations 6.2.2 Power commands The following commands are available as power commands. IDLE • IDLE IMMEDIATE • STANDBY • STANDBY IMMEDIATE • SLEEP • CHECK POWER MODE • SET FEATURES (APM setting) • 6-10 C141-E249...
6.3 Power Save Controlled by Interface Power Management (IPM) 6.3 Power Save Controlled by Interface Power Management (IPM) The host system can change the power consumption status of the interface by issuing the PARTIAL or SLUMBER request to the device. 6.3.1 Power save mode of the interface The interface power consumption states of this device can be separated into the following three modes, including the Active mode where the device is in the active...
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Operations (3) Slumber mode In this mode, the (deep) Power Save mode is set for the interface circuit. The device switches to Slumber mode when the following occurs: The device receives the PMREQ_P signal from the host and responds with the •...
6.4 Read-ahead Cache Read-ahead Cache is the function for automatically reading data blocks upon completion of the read command in order to read data from disk media and save data block on a data buffer. If a subsequent command requests reading of the read-ahead data, data on the data buffer can be transferred without accessing the disk media.
Operations 6.4.2 Caching operation The caching operation is performed only when the commands listed below are received. If any of the following data are stored on the data buffer, the data is sent to the host system. All of the sector data that this command processes. •...
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(3) Invalidating caching-target data Data that is a target of caching on the data buffer is invalidated under the following conditions: 1)-1 Any command other than the following commands is issued. (All caching- target data is invalidated.) READ BUFFER WRITE BUFFER RECALIBRATE FORMAT TRACK SET FEATURES...
Operations 6.4.3 Using the read segment buffer Methods of using the read segment buffer are explained for following situations. 6.4.3.1 Miss-hit In this situations, the top block of read requested data is not stored at all in the data buffer. As a result, all of the read requested data is read from disk media. 1) HAP (host address pointer) and DAP (disk address pointer) are defined in the head of the segment allocated from Buffer.
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6.4.3.2 Sequential hit When the read command that is targeted at a sequential address is received after execution of the read commands is completed, the read command transmits the Read requested data to the host system continuing read-ahead without newly allocating the buffer for read.
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Operations 6.4.3.3 Full hit In this situation, all read requested data is stored in the data buffer. Transfer of the read requested data is started from the location where hit data is stored. For data that is a target of caching and remains before a full hit, the data is retained when execution of the command is completed.
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6.4.3.4 Partial hit In this situation, a part of read requested data including the top sector is stored in the data buffer. A transfer of the read requested data starts from the address where the data that is hit is stored until the top sector of the read requested data. Remaining part of insufficient data is read then.
Operations 6.5 Write Cache Write Cache is the function for reducing the command processing time by separating command control to disk media from write control to disk media. When Write Cache is permitted, the write command can be keep receiving as long as the space available for data transfers remains free on the data buffer.
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(3) Status report in the event of an error The status report concerning an error occurring during writing onto media is created when the next command is issued. Where the command reporting the error status is not executed, only the error status is reported. Only the status of an error that occurs during write processing is reported.
Actuator Head positioning assembly. The actuator consists of a voice coil motor and head arm. If positions the read-write (R-W) head. AT bus A bus between the host CPU and adapter board ATA (AT Attachment) standard The ATA standard is for a PC AT interface regulated to establish compatibility between products manufactured by different vendors.
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Glossary Disk enclosure. The DE includes the disks, built-in spindle motor, actuator, heads, and air filter. The DE is sealed to protect these components from dust. Host receptacle Host receptacle is a connector type on the host system that the signal segment of Serial-ATA unifies with the power supply segment.
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Seek time The seek time is the time required for a head to move from the current track to another track. The seek time does not include the mean rotational delay. Serial-ATA Serial ATA is an extension specification from the current Parallel ATA physical storage interface.
Acronyms and Abbreviations ABRT Aborted command Automatic idle control AMNF Address mark not found AT attachment American wire gage Bad block detected BIOS Basic input-output system CORR Corrected data Cylinder high field Cylinder low field Command field Current sense resistor Current start/stop Cylinder field dB A-scale weighting...
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Index signal interface regulation ... 5-4 signal segment ... 3-10 signal, interface ... 5-2 SLEEP ... 5-54 sleep mode... 6-9 slope of an input voltage at rise... 1-6 slumber mode ... 6-12 SMART ... 5-55 SMART command transport (SCT) ... 5-72 SMART comprehensive error log, data format of...
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