Performance Verification; Development Station - HP 64000 Reference Manual

Logic development system
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MODEL 64000
SYSTEM OVERVIEW MANUAL
NOTE
VVhen tape load is complete, system "software load complete"
message should be displayed on the screen.
g. Insert other tape (if provided) in tape drive; tape should begin booting automatically
and BOOT IN PROGRESS message should appear on screen. (Repeat this step for
each additional tape.)
h. When all tape loading is complete, remove tape cartridge and reset System Control
Source Switches to 00, SYSTEM BUS (DISC); normal operation is now automatically
resumed.
NOTE
For format, test, soft fix, or hard fix options, refer to the System
Overview Service Manual.
Performance Verification
Development Station
Set SYSTEM CONTROL SOURCE switches (located on rear panel) to PERFORMANCE
VERIFICATION (11). Turn the development station power ON. There will be a loud beep the
instant that power is switched on. This will quickly be followed by another beep and, if the
display is warmed up, a random series of characters in the upper-left corner of the display.
The random characters will remain approximately 1/2 second after which a second beep will
be heard and a display pattern as shown in figure 2-5 will be visible.
The first beep signals the successful completion of the Short ROM Test which ensures that
enough of the ROM code is working to enable the use of the Long ROM Test's diagnostic
capability. This is accomplished by doing a partial checksum of the ROM code. If the
checksum is good, the Performance Verification proceeds to the Short RAM Test; otherwise,
the Short ROM Test loops.
The second beep signals the successful completion of the Short RAM Test which reads ROM
data and writes this information to RAM addresses. This includes some general memory
locations and all display and basepage locations. The test then waits one second to verify the
RAM's refresh and XOR's the ROM and RAM data. At the same time the ROM data is read
again, complemented, and stored in RAM. After another one-second delay, the RAM data is
XOR'd with complemented ROM data. If ROM and RAM data are identical, the XORs will
result in all zeros and the test will pass. Any difference between ROM and RAM data gives a
nonzero result which causes the test to repeat. Random data should be visible in the upper-
left corner of the display during this test.
2-21

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