Configuring Counter For Pwm Mode; Pulse Width Modulation With Dead Time Mode - Infineon PSoC 61 Reference Manual

PSoC™ 61, PSoC™ 62 MCU: CY8C6xx5 architecture
Timer, Counter, and PWM (TCPWM)

30.3.4.2 Configuring counter for PWM mode

The steps to configure the counter for the PWM mode of operation and the affected register bits are as follows.
1. Disable the counter by writing '1' to the TCPWM_CTRL_CLR register.
2. Select PWM mode by writing '100b' to the MODE[26:24] field of the TCPWM_CNT_CTRL register.
3. Set clock prescaling by writing to the GENERIC[15:8] field of the TCPWM_CNT_CTRL register.
4. Set the required 16/32-bit period in the TCPWM_CNT_PERIOD register and the buffer period value in the
TCPWM_CNT_PERIOD_BUFF register to swap values, if required.
5. Set the 16/32-bit compare value in the TCPWM_CNT_CC register and buffer compare value in the
TCPWM_CNT_CC_BUFF register to swap values, if required.
6. Set the direction of counting by writing to the UP_DOWN_MODE[17:16] field of the TCPWM_CNT_CTRL
register to configure left-aligned, right-aligned, or center-aligned PWM.
7. Set the PWM_STOP_ON_KILL and PWM_SYNC_KILL fields of the TCPWM_CNT_CTRL register as required.
8. Set the TCPWM_CNT_TR_CTRL0 register to select the trigger that causes the event (reload, start, kill, swap,
and count).
9. Set the TCPWM_CNT_TR_CTRL1 register to select the edge that causes the event (reload, start, kill, swap, and
count).
10. pwm and pwm_n can be controlled by the TCPWM_CNT_TR_CTRL2 register to set, reset, or invert upon CC,
OV, and UN conditions.
11. If required, set the interrupt upon TC or CC condition.
12. Enable the counter by writing '1' to the TCPWM_CTRL_SET register. A reload trigger must be provided through
firmware (TCPWM_CMD_RELOAD register) to start the counter if the hardware reload signal is not enabled.
30.3.5

Pulse Width Modulation with Dead Time mode

The PWM-DT functionality is the same as PWM functionality, except for the following differences:
• PWM_DT supports dead time insertion; PWM does not support dead time insertion.
• PWM_DT does not support clock pre-scaling; PWM supports clock pre-scaling.
Reload
Start
Stop/Kill
Count
Capture/Swap
clk_counter
no clock pre-scaling
underflow
overflow generation
cc_match
TCPWM_CNT_TR_CTRL2
Figure 30-38. PWM with dead time functionality
Dead time insertion is a step that operates on a preliminary PWM output signal pwm_dt_input, as illustrated in
Figure 30-38.
Reference manual
PWM
PERIOD_BUFF
PERIOD
COUNTER
CC
CC_BUFF
PWM
pwm_dt_input
tc
cc_match
==
underflow
overflow
==
pwm polarity
Dead time
kill period
insertion
pwm_n polarity
only supported in
PWM_DT mode
554
Interrupt
interrupt
generation
tr_cc_match
Trigger
tr_underflow
generation
tr_overflow
PWM
pwm_dt_input
generation
pwm
pwm_n
002-27293 Rev. *E
2023-09-06