Related Manuals for ADLINK Technology EGX-MXM-A4500
Summary of Contents for ADLINK Technology EGX-MXM-A4500
- Page 1 EGX-MXM-A4500 NVIDIA Ampere™ GA104 RTX A4500 Embedded Graphics Module User’s Manual Manual Rev.: Oct. 16, 2022 Revision Date: 50M-00094-1000 Part No:...
- Page 2 Leading EDGE COMPUTING Revision History Revision Release Date Description of Change(s) 2022-10-16 Initial release Revision History...
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Page 3: Preface
EGX-MXM-A4500 Preface Copyright © 2022 ADLINK Technology Inc. This document contains proprietary information protected by copy- right. All rights are reserved. No part of this manual may be repro- duced by any mechanical, electronic, or other means in any form without prior written permission of the manufacturer. - Page 4 California Proposition 65 Warning WARNING: This product can expose you to chemicals including acrylamide, arsenic, benzene, cadmium, Tris(1,3-dichloro-2-propyl) phosphate (TDCPP), 1,4- Dioxane, formaldehyde, lead, DEHP, styrene, DINP, BBP, PVC, and vinyl materials, which are known to the State of California to cause cancer, and acrylamide, benzene, cadmium, lead, mercury, phthalates, toluene, DEHP, DIDP, DnHP, DBP, BBP, PVC, and vinyl materials, which are known to the State of California to cause birth defects or other reproductive harm.
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Page 5: Table Of Contents
EGX-MXM-A4500 Table of Contents Revision History..............ii Preface ..................iii List of Tables................. vii List of Figures ................ ix 1 Introduction ................ 1 Overview................1 Features................2 Specifications............... 3 1.3.1 Graphics Module ............3 1.3.2 Display Support and Options........4 1.3.3... - Page 6 Important Safety Instructions..........23 Getting Service ..............25 Table of Contents...
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Page 7: List Of Tables
EGX-MXM-A4500 List of Tables Table 1-1: Graphics Module Display Options ......4 Table 1-2: NVIDIA Link Display Types ........4 Table 1-3: MXM Connector Pin Definitions........9 Table 1-4: Thermal Policy............14 List of Tables... - Page 8 This page intentionally left blank. viii List of Tables...
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Page 9: List Of Figures
List of Figures Figure 1-1: EGX-MXM-A4500 Functional Block Diagram..... 5 Figure 1-2: EGX-MXM-A4500 Dimensions ........6 Figure 1-3: EGX-MXM-A4500 Top and Side Views...... 7 Figure 1-4: EGX-MXM-A4500 Bottom View........8 Figure 1-5: MXM Connector............9 Figure 2-1: Power Sequencing ........... 17 Figure 2-2: Module Power Down .......... - Page 10 This page intentionally left blank. List of Figures...
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Page 11: Introduction
NVIDIA RTX A4500 embedded GPU based on the advanced NVIDIA Ampere GA104 architecture in MXM 3.1 Type B form fac- tor. The EGX-MXM-A4500 brings a new level of performance to visual graphics and computing applications, fully integrating hard- ware acceleration for both graphics and computing code, enabling hardware acceleration for a wider class of software applications than ever before. -
Page 12: Features
1.2 Features MXM 3.1 Type B FF (82 x 105 mm) 5888 CUDA cores 17.66 TFLOPS SP peak performance 8/16 GB GDDR6 memory 512 GB/s maximum memory bandwidth Support for up to 4 DisplayPort 1.4b displays, 80/115W TGP 5 year performance warranty NVIDIA RTX A4500 GPU Package 40 x 40 mm Base Clock @930 MHz with 115W TGP... -
Page 13: Specifications
EGX-MXM-A4500 1.3 Specifications 1.3.1 Graphics Module Graphics Core Architecture NVIDIA® Ampere GA104 RTX A4500 4x DisplayPort 1.4. Max. simultaneous display resolution: Display Outputs 2x 7680 x 4320 @60Hz 4x 5120 x 2880 @ 60Hz 4x 4096 x 2160 @ 120Hz Signal Interface MXM 3.1, PCI Express Gen4 x16 support... -
Page 14: Display Support And Options
CUDA Compute version 6.1 and higher OpenCL™ 1.2 DirectX® 12 OpenGL 4.6 Vulcan 1.0 1.3.4 Graphics Options The EGX-MXM-A4500 supports a 4x DisplayPort by default, with five display output options as shown below. DP_A DP_B DP_C DP_D LVDS_L MXM port... -
Page 15: Functional Block Diagram
DP_D IFPF NVVDD-PH2 NVVDD-PH6 NVVDD-PH3 NVVDD-PH7 (1(B: DQG : NVVDD-PH4 NVVDD-PH8 Power Management (PWR_EN PWR_GOOD WAKE#) Power Supply I2CS FBVDD-PH1~3 JTAG Power Supply PEX_VDD Power Supply SPI - VBIOS VDD_1V8A Power Supply NV3V3 Figure 1-1: EGX-MXM-A4500 Functional Block Diagram Introduction... -
Page 16: Mechanical Layout
1.5 Mechanical Layout All dimensions shown are in mm NOTE: NOTE: Figure 1-2: EGX-MXM-A4500 Dimensions Introduction... -
Page 17: Figure 1-3: Egx-Mxm-A4500 Top And Side Views
PTH HOLE 4 PCS 2 PCS TOP SIDE: OD=6.0mm; ID=3.2mm BOTTOM SIDE: OD=7.0mm; ID=3.2mm 1.25 0.50 1.25 0.50 0.50 0.50 1 ±0.05 E-Section D-Section Scale 2 : 1 Scale 2 : 1 Figure 1-3: EGX-MXM-A4500 Top and Side Views Introduction... -
Page 18: Figure 1-4: Egx-Mxm-A4500 Bottom View
39.76 34.74 28.75 129x0.35 2x4.82 2.35 1.85 Figure 1-4: EGX-MXM-A4500 Bottom View Introduction... -
Page 19: Mxm Connector Pin Definitions
EGX-MXM-A4500 1.6 MXM Connector Pin Definitions (R G5 X G6) Pin 125 Pin 281 Pin E1 Pin 133 Pin E3 Pin E2 Pin 134 Pin 124 Pin E4 Figure 1-5: MXM Connector Primary Side (bottom side) Secondary Side (top side) - Page 20 Primary Side (bottom side) Secondary Side (top side) Signal PU/PD Signal PU/PD 100K PU to RSVD SMB_DAT 3.3V 100K PU to RSVD SMB_CLK 3.3V RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD PEX_TX15# PEX_RX15# PEX_TX15 PEX_RX15 PEX_TX14# PEX_RX14# PEX_TX14 PEX_RX14 PEX_TX13# PEX_RX13#...
- Page 21 EGX-MXM-A4500 Primary Side (bottom side) Secondary Side (top side) Signal PU/PD Signal PU/PD PEX_TX8# PEX_RX8# PEX_TX8 PEX_RX8 PEX_TX7# PEX_RX7# PEX_TX7 PEX_RX7 PEX_TX6# PEX_RX6# PEX_TX6 PEX_RX6 PEX_TX5# PEX_RX5# PEX_TX5 PEX_RX5 PEX_TX4# PEX_RX4# PEX_TX4 PEX_RX4 PEX_TX3# PEX_RX3# PEX_TX3 PEX_RX3 PEX_RX2# PEX_TX2# PEX_RX2...
- Page 22 Primary Side (bottom side) Secondary Side (top side) Signal PU/PD Signal PU/PD PEX_RX0 PEX_TX0 PEX_REFCLK# 154 PEX_CLK_REQ# PEX_REFCLK PEX_RST# RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD...
- Page 23 EGX-MXM-A4500 Primary Side (bottom side) Secondary Side (top side) Signal PU/PD Signal PU/PD DP_C_L2# DP_D_L1# DP_C_L2 DP_D_L1 DP_C_L3# DP_D_L2# DP_C_L3 DP_D_L2 DP_C_AUX# DP_D_L3# DP_C_AUX DP_D_L3 RSVD RSVD DP_D_AUX# RSVD DP_D_AUX RSVD DP_C_HPD PD 100K RSVD DP_D_HPD PD 100K RSVD RSVD...
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Page 24: Thermal Policy
Primary Side (bottom side) Secondary Side (top side) Signal PU/PD Signal PU/PD DP_B_AUX# DP_A_L3# DP_B_AUX DP_A_L3 DP_B_HPD PD 100K DP_A_HPD PD 100K DP_A_AUX# DP_A_AUX PRSNT_L# 0 ohm PD Table 1-3: MXM Connector Pin Definitions 1.7 Thermal Policy The GPU core clock throttles at temperatures (T ) past the thresh- olds shown with the behaviors as listed. -
Page 25: Unpacking Checklist
Retain the shipping carton and packing materials for inspection. Obtain authorization from your dealer before returning any product to ADLINK. Ensure that the fol- lowing items are included in the package. EGX-MXM-A4500 embedded graphics module Introduction... - Page 26 This page intentionally left blank. Introduction...
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Page 27: System Requirements
EGX-MXM-A4500 System Requirements 2.1 Power Sequencing For initial power on, or to Resume from S3 and S4, this sequence must be followed. PV-PE PE-PG PV-PE PE-PG Figure 2-1: Power Sequencing System Requirements... -
Page 28: Module Power Up And Down
2.2 Module Power Up and Down Issuing the PWR_EN signal powers the MXM module down, and the system designer can decide whether to keep the module input power when the MXM module is powered down. MODULE INPUT POWER PWR_EN MODULE INTERNAL POWER PWR_GOOD Figure 2-2: Module Power Down... -
Page 29: System Bios Settings
EGX-MXM-A4500 2.4 System BIOS Settings The system BIOS must meet the following criteria: SBIOS must support the "Above 4G decoding" feature to support a resizable BAR1 size. SBIOS must enable "Above 4G decoding" as the default configuration. The following is a sample BIOS menu setting for reference. The actual menu setting can vary depending on the specific SBIOS design. -
Page 30: Dual Mode Displayport Implementation
2.5 Dual Mode DisplayPort Implementation The EGX-MXM-A4500 supports four dual mode DisplayPorts by default. HDMI can be supported via dongle (see “Display Support and Options” on page 4). The system requires a switch circuit to determine whether the AUX or DDC signal is output from the MXM module, and AC coupling capacitors should be placed on the sys- tem board. -
Page 31: Dvi/Hdmi On Displayport Interface
EGX-MXM-A4500 2.6 DVI/HDMI on DisplayPort Interface DVI and HDMI connectors can both be implemented through the DisplayPort interface. To support HDMI display from MXM, the HDMI port needs to be routed from DP_C and/or DP_A. To sup- port DVI from MXM, the DVI port needs to be routed from DP_B and/ or LVDS_L. -
Page 32: Driver Installation
NI is Reserve Figure 2-7: Active IC for HDMI Dongle 2.7 Driver Installation Drivers can be downloaded from: https://www.adlinktech.com/Products/Embedded_Graphics/ embedded-graphics-solutions/EGX-MXM-A4500 2.8 Certifications & Agencies Windows Hardware Quality Lab (WHQL) certified for Windows 10 and Windows 11 EU Reduction of Hazardous Substances (EU-RoHS) Conformité... - Page 33 EGX-MXM-A4500 Important Safety Instructions For user safety, please read and follow all instructions, Warnings, Cautions, and Notes marked in this manual and on the associated device before handling/operating the device, to avoid injury or damage. S'il vous plaît prêter attention stricte à tous les avertissements et mises en garde figurant sur l'appareil , pour éviter des blessures...
- Page 34 Never attempt to repair the device, which should only be serviced by qualified technical personnel using suitable tools The device must be serviced by authorized technicians when: The power cord or plug is damaged Liquid has entered the device interior The device has been exposed to high humidity and/or moisture The device is not functioning or does not function...
- Page 35 San Jose, CA 95119-1208, USA Tel: +1-408-360-0200 Toll Free: +1-800-966-5200 (USA only) Fax: +1-408-600-1189 Email: info@adlinktech.com ADLINK Technology (China) Co., Ltd. 300 Fang Chun Rd., Zhangjiang Hi-Tech Park Pudong New Area, Shanghai, 201203 China Tel: +86-21-5132-8988 Fax: +86-21-5132-3588 Email: market@adlinktech.com ADLINK Technology GmbH Hans-Thoma-Straße 11...
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